The following sections list the initialization subsequences for the available encryption and decryption modes:
Subsequence: Initialize CCM AES Core Mode
The steps to initialize CCM mode follow:
- Define the width of the length field and the
length of the authentication field by programming the CCM_L and CCM_M bit
fields in the S_CTRL register.
- Enable counter mode by setting the CTR bit in the
S_CTRL register.
- Load the authentication data length in the AUTH
field of the AES Authentication Data Length (S_AUTH_LENGTH) register.
- Select the IV counter by programming the
CTR_WIDTH field in the S_CTRL register.
- Load the AES Initialization Vector Input n (S_IV_IN_n) registers.
Subsequence: Initialize GCM AES Core Mode
The steps to enable GCM mode follow:
- Enable counter mode by setting the CTR bit in the
S_CTRL register.
- Load the authentication data length in the AUTH
field of the AES Authentication Data Length (S_AUTH_LENGTH) register.
- Select the IV counter by programming the
CTR_WIDTH field in the S_CTRL register.
- Load the AES Initialization Vector Input n (S_IV_IN_n) registers.
Subsequence: Initialize CBC-MAC AES Core Mode
The steps to initialize CBC-MAC mode follow:
- Enable CBC-MAC mode by setting the CBCMAC bit in
the S_CTRL register.
- Select encryption mode by setting the DIRECTION
bit in the S_CTRL register.
- Load the AES Initialization Vector Input n (S_IV_IN_n) registers.
Subsequence: Initialize F9 AES Core Mode
The steps to configure the AES for F9 mode follow:
- Enable F9 mode by setting the F9 bit in the
S_CTRL register.
- Set the key size to 128 bits by programming the
KEY_SIZE field to 0x1 in the S_CTRL register.
- Load the AES Initialization Vector Input n (S_IV_IN_n) registers.
Subsequence: Initialize F8 AES Core Mode
The steps to configure the AES for F8 mode follow:
- Enable F8 mode by setting the F8 bit in the
S_CTRL register.
- Select the counter width by programming the
CTR_WIDTH field in the S_CTRL register.
- Set the key size to 128 bits by setting the
KEY_SIZE field to 0x1 in the S_CTRL register.
- Load the AES Initialization Vector Input n (S_IV_IN_n) registers.
Subsequence: Initialize XTS AES Core Mode
The steps to configure XTS mode follow:
- Enable XTS mode by configuring the XTS field in
the S_CTRL register.
- If the XTS field in the S_CTRL register indicates
that the AAD length is required, load the AAD length in the S_AUTH_LENGTH
register.
- Load the AES Initialization Vector Input n (S_IV_IN_n) registers.
Subsequence: Initialize CFB AES Core Mode
The steps to initialize the AES code for CFB mode follow:
- Enable CFB mode by setting the CFB bit in the
S_CTRL register.
- Load the AES Initialization Vector Input n (S_IV_IN_n) registers.
Subsequence: Initialize ICM AES Core Mode
The steps to initialize the AES code for ICM mode follow:
- Enable ICM mode by setting the ICM bit in the
S_CTRL register.
- Configure for a 16-bit counter by programming the
CTR_WIDTH field to 0x0 in the S_CTRL register.
- Load the AES Initialization Vector Input n (S_IV_IN_n) registers.
Subsequence: Initialize CTR AES Core Mode
The steps to initialize CTR mode follow:
- Enable CTR mode by setting the CTR bit in the
S_CTRL register.
- Select counter width by programming the CTR_WIDTH
in the S_CTRL register.
- Load the AES Initialization Vector Input n (S_IV_IN_n) registers.
Subsequence: Initialize CBC AES Core Mode
The steps to configure CBC mode follow:
- Enable CBC mode by setting the MODE bit in the
S_CTRL register.
- Load the AES Initialization Vector Input n (S_IV_IN_n) registers.