SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Interrupt_Enabled_Status_Clear.
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Instance Name | Physical Address |
---|---|
MPU_HSM | 4024 0014h |
MPU_HSM_DTHE | 4012 0014h |
MPU_L2OCRAM_BANK0 | 4002 0014h |
MPU_L2OCRAM_BANK1 | 4004 0014h |
MPU_L2OCRAM_BANK2 | 4006 0014h |
MPU_L2OCRAM_BANK3 | 4008 0014h |
MPU_MBOX_SRAM | 4014 0014h |
MPU_QSPI0 | 4016 0014h |
MPU_R5SS0_CORE0_AXIS | 400A 0014h |
MPU_R5SS0_CORE1_AXIS | 400C 0014h |
MPU_R5SS1_CORE0_AXIS | 400E 0014h |
MPU_R5SS1_CORE1_AXIS | 4010 0014h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ENABLED_ADDR_ERR | ENABLED_PROT_ERR | |||||
R | R/W0TC | R/W0TC | |||||
0h | 0h | 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:2 | RESERVED | R | 0h | Always read as 0. |
1 | ENABLED_ADDR_ERR | R/W0TC | 0h | Addressing violation error. Enabled status is read.Write a 1 to clear the status. Writing a 0 has no effect. |
0 | ENABLED_PROT_ERR | R/W0TC | 0h | Protection violation error. Enabled status is read. Write a 1 to clear the status. Writing a 0 has no effect. |