SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Programmable_7_End_Address.
Return to Summary Table
Instance Name | Physical Address |
---|---|
MPU_HSM | 4024 0264h |
MPU_HSM_DTHE | 4012 0264h |
MPU_L2OCRAM_BANK0 | 4002 0264h |
MPU_L2OCRAM_BANK1 | 4004 0264h |
MPU_L2OCRAM_BANK2 | 4006 0264h |
MPU_L2OCRAM_BANK3 | 4008 0264h |
MPU_MBOX_SRAM | 4014 0264h |
MPU_QSPI0 | 4016 0264h |
MPU_R5SS0_CORE0_AXIS | 400A 0264h |
MPU_R5SS0_CORE1_AXIS | 400C 0264h |
MPU_R5SS1_CORE0_AXIS | 400E 0264h |
MPU_R5SS1_CORE1_AXIS | 4010 0264h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
END_ADDR | |||||||
R/W | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
END_ADDR | |||||||
R/W | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
END_ADDR | |||||||
R/W | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
END_ADDR | |||||||
R/W | |||||||
0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:0 | END_ADDR | R/W | 0h | End address for range N. Defaults to input signal value. |