SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
This register is used by R5SS1 Core 0 to know that the Receiver CPU has read the Mailbox and Acked. It is also used to clear the Read Done Interrupt.
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Instance Name | Physical Address |
---|---|
MSS_CTRL | 50D0 C00Ch |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | MSS_CR5A1_MBOX_READ_DONE_PROC_7 | RESERVED | MSS_CR5A1_MBOX_READ_DONE_PROC_6 | ||||
NONE | R/W | NONE | R/W | ||||
0h | 0h | 0h | 0h | ||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | MSS_CR5A1_MBOX_READ_DONE_PROC_5 | RESERVED | MSS_CR5A1_MBOX_READ_DONE_PROC_4 | ||||
NONE | R/W | NONE | R/W | ||||
0h | 0h | 0h | 0h | ||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | MSS_CR5A1_MBOX_READ_DONE_PROC_3 | RESERVED | MSS_CR5A1_MBOX_READ_DONE_PROC_2 | ||||
NONE | R/W | NONE | R/W | ||||
0h | 0h | 0h | 0h | ||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | MSS_CR5A1_MBOX_READ_DONE_PROC_1 | RESERVED | MSS_CR5A1_MBOX_READ_DONE_PROC_0 | ||||
NONE | R/W | NONE | R/W | ||||
0h | 0h | 0h | 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:29 | RESERVED | NONE | 0h | Reserved |
28 | MSS_CR5A1_MBOX_READ_DONE_PROC_7 | R/W | 0h | This register should be written once finishing Reading from proc7's mailbox written by CR5A |
27:25 | RESERVED | NONE | 0h | Reserved |
24 | MSS_CR5A1_MBOX_READ_DONE_PROC_6 | R/W | 0h | This register should be written once finishing Reading from proc6's mailbox written by CR5A |
23:21 | RESERVED | NONE | 0h | Reserved |
20 | MSS_CR5A1_MBOX_READ_DONE_PROC_5 | R/W | 0h | This register should be written once finishing Reading from proc5's mailbox written by CR5A |
19:17 | RESERVED | NONE | 0h | Reserved |
16 | MSS_CR5A1_MBOX_READ_DONE_PROC_4 | R/W | 0h | This register should be written once finishing Reading from proc4's mailbox written by CR5A |
15:13 | RESERVED | NONE | 0h | Reserved |
12 | MSS_CR5A1_MBOX_READ_DONE_PROC_3 | R/W | 0h | This register should be written once finishing Reading from proc3's mailbox written by CR5A |
11:9 | RESERVED | NONE | 0h | Reserved |
8 | MSS_CR5A1_MBOX_READ_DONE_PROC_2 | R/W | 0h | This register should be written once finishing Reading from proc2's mailbox written by CR5A |
7:5 | RESERVED | NONE | 0h | Reserved |
4 | MSS_CR5A1_MBOX_READ_DONE_PROC_1 | R/W | 0h | This register should be written once finishing Reading from proc1's mailbox written by CR5A |
3:1 | RESERVED | NONE | 0h | Reserved |
0 | MSS_CR5A1_MBOX_READ_DONE_PROC_0 | R/W | 0h | This register should be written once finishing Reading from proc0's mailbox written by CR5A |