SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Register to Mask Correctable error from R5SS0 CORE0 Memories.
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Instance Name | Physical Address |
---|---|
MSS_CTRL | 50D1 8080h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
NONE | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
NONE | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
NONE | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_IDATA_CORR_ERR | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_ITAG_CORR_ERR | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_DDATA_CORR_ERR | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_DTAG_CORR_ERR | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_B0TCM_CORR_ERR | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_B1TCM_CORR_ERR | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_ATCM_CORR_ERR |
NONE | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:7 | RESERVED | NONE | 0h | Reserved |
6 | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_IDATA_CORR_ERR | R/W | 0h | Mask Interrupt for correctable errors to aggregated Interrupt of corresponding CPU 1'b1 : Interrupt is Masked 1'b0 : Interrupt is Unmasked |
5 | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_ITAG_CORR_ERR | R/W | 0h | Mask Interrupt for correctable errors to aggregated Interrupt of corresponding CPU 1'b1 : Interrupt is Masked 1'b0 : Interrupt is Unmasked |
4 | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_DDATA_CORR_ERR | R/W | 0h | Mask Interrupt for correctable errors to aggregated Interrupt of corresponding CPU 1'b1 : Interrupt is Masked 1'b0 : Interrupt is Unmasked |
3 | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_DTAG_CORR_ERR | R/W | 0h | Mask Interrupt for correctable errors to aggregated Interrupt of corresponding CPU 1'b1 : Interrupt is Masked 1'b0 : Interrupt is Unmasked |
2 | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_B0TCM_CORR_ERR | R/W | 0h | Mask Interrupt for correctable errors to aggregated Interrupt of corresponding CPU 1'b1 : Interrupt is Masked 1'b0 : Interrupt is Unmasked |
1 | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_B1TCM_CORR_ERR | R/W | 0h | Mask Interrupt for correctable errors to aggregated Interrupt of corresponding CPU 1'b1 : Interrupt is Masked 1'b0 : Interrupt is Unmasked |
0 | R5SS0_CPU0_ECC_CORR_ERRAGG_MASK_R5SS0_CPU0_ATCM_CORR_ERR | R/W | 0h | Mask Interrupt for correctable errors to aggregated Interrupt of corresponding CPU 1'b1 : Interrupt is Masked 1'b0 : Interrupt is Unmasked |