SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

5.2.21.1 MSS_TOPRCM_PLL_CORE_FRACCTRL Register (Offset = 420h) [reset = 0h]

Spread Specturm control for Core PLL - Not Supported.

Table 2-1448 Instance Table

Instance Name	Physical Address
MSS_TOPRCM	5320 0420h

Figure 2-722 MSS_TOPRCM_PLL_CORE_FRACCTRL Name Register

31	30	29	28	27	26	25	24
PLL_CORE_FRACCTRL_DOWNSPREAD	PLL_CORE_FRACCTRL_MODFREQDIVIDEREXPONENT			PLL_CORE_FRACCTRL_MODFREQDIVIDERMANTISSA
R/W	R/W			R/W
0h	0h			0h
23	22	21	20	19	18	17	16
PLL_CORE_FRACCTRL_MODFREQDIVIDERMANTISSA			PLL_CORE_FRACCTRL_DELTAMSTEPINTEGER			PLL_CORE_FRACCTRL_DELTAMSTEPFRACTION
R/W			R/W			R/W
0h			0h			0h
15	14	13	12	11	10	9	8
PLL_CORE_FRACCTRL_DELTAMSTEPFRACTION
R/W
0h
7	6	5	4	3	2	1	0
PLL_CORE_FRACCTRL_DELTAMSTEPFRACTION
R/W
0h

Table 2-1449 MSS_TOPRCM_PLL_CORE_FRACCTRL Register Field Descriptions

Bit	Field	Type	Reset	Description
31	PLL_CORE_FRACCTRL_DOWNSPREAD	R/W	0h	Controls frequency spread 0x0 : enables both side frequency spread about the programmed frequency. 0x1 : enables low frequency spread only
30:28	PLL_CORE_FRACCTRL_MODFREQDIVIDEREXPONENT	R/W	0h	Exponent of the REFCLK divider to define the modulation frequency.
27:21	PLL_CORE_FRACCTRL_MODFREQDIVIDERMANTISSA	R/W	0h	Mantissa of the REFCLK divider to define the modulation frequency
20:18	PLL_CORE_FRACCTRL_DELTAMSTEPINTEGER	R/W	0h	Integer part of Frequency Spread control
17:0	PLL_CORE_FRACCTRL_DELTAMSTEPFRACTION	R/W	0h	The fraction part of Frequency Spread control