SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

5.2.10.1 ESM_HI_PRI Register (Offset = 24h) [reset = FFFFFFFFh]

Shows which is the highest priority outstanding high priority interrupt.

Table 5-1011 Instance Table

Instance Name	Physical Address
ESM0	52D0 0024h

Figure 5-503 ESM_HI_PRI Name Register

Table 5-1012 ESM_HI_PRI Register Field Descriptions

Bit	Field	Type	Reset	Description
31:16	PLS	R	FFFFh	Indicates what the highest priority High Priority interrupt caused by a pulse number is. The lowest event has the highest priority. i.e. if Global Events 0, 1, 2, 3, and 4 are pending, and Global Event 0, and 1 are configured for High Priority while Global Events 2, 3, and 4 are configured for Low Priority, then the value of this field will be 0x0. A value of all ones (0xFFFF) indicates that there are no high priority interrupts pending. This field is updated whenever a new, higher priority event comes in. Software cannot read this field multiple times during an interrupt service routine to keep track of which interrupt is being serviced, because this field may have been updated with a higher priority event.
15:0	LVL	R	FFFFh	Indicates what the highest priority Low Priority interrupt caused by a level number is. The lowest event has the highest priority. i.e. if Global Events 0, 1, 2, 3, and 4 are pending, and Global Event 0, and 1 are configured for High Priority while Global Events 2, 3, and 4 are configured for Low Priority, then the value of this field will be 0x0. A value of all ones (0xFFFF) indicates that there are no high priority interrupts pending. This field is updated whenever a new, higher priority event comes in. Software cannot read this field multiple times during an interrupt service routine to keep track of which interrupt is being serviced, because this field may have been updated with a higher priority event.