SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Error Command Register.
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Instance Name | Physical Address |
---|---|
EDMA0 | 52A6 0130h |
EDMA1 | 52A4 0130h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
NONE | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
NONE | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
NONE | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | SET | EVAL | |||||
NONE | W | W | |||||
0h | 0h | 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:2 | RESERVED | NONE | 0h | Reserved |
1 | SET | W | 0h | Set TPTC error interrupt: Write of '1' to SET causes TPTC error interrupt to be pulsed unconditionally. Writes of '0' have no affect. |
0 | EVAL | W | 0h | Evaluate state of TPTC error interrupt Write of '1' to EVAL causes TPTC error interrupt to be pulsed if any of the ERRSTAT bits are set to '1'. Writes of '0' have no affect. |