SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Receive buffer pointer load register.
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Instance Name | Physical Address |
---|---|
FSI_RX0 | 5029 001Ch |
FSI_RX1 | 5029 101Ch |
FSI_RX2 | 502B 001Ch |
FSI_RX3 | 502B 101Ch |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED_1 | |||||||
R | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED_1 | BUF_PTR_LOAD | ||||||
R | R/W | ||||||
0h | 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15:4 | RESERVED_1 | R | 0h | Reserved |
3:0 | BUF_PTR_LOAD | R/W | 0h | Buffer Pointer Load. This is the value to be loaded into the receive word pointer when written. This is to allow software to force the receiver to start storing the received data starting at a specific location in the buffer. NOTE: The value of the CURR_BUF_PTR in the RX_BUF_PTR_STS will not get reflected immediately. This will take effect only when there is a valid receive operation with incoming clocks after [3 RXCLK + 3 SYCLK] cycles. |