SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Power Counter Register
This register is used to program a mmc counter to delay command transfers after activating the PAD power, this value depends on PAD characteristics and voltage.
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Instance Name | Physical Address |
---|---|
MMCSD0 | 4830 0130h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
PWRCNT | |||||||
R/W | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PWRCNT | |||||||
R/W | |||||||
0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:16 | RESERVED | R | 0h | |
15:0 | PWRCNT | R/W | 0h | Power counter register. This register is used to introduce a delay between the PAD ACTIVE pin assertion and the command issued. 65535 TCF x 65535 delay (card clock period) 65534 TCF x 65534 delay (card clock period) 2 TCF x 2 delay (card clock period) 1 TCF delay (card clock period) 0 No additional delay added |