SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
SS Interrupt Control Register.
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Instance Name | Physical Address |
---|---|
CPSW0 | 5280 0018h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
INT_TEST | INT_SEL_VEC_EN | RESERVED | |||||
R/W | R/W | NONE | |||||
0h | 0h | 0h | |||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | INT_PACE_EN | ||||||
NONE | R/W | ||||||
0h | 0h | ||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | INT_PRESCALE | ||||||
NONE | R/W | ||||||
0h | 0h | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
INT_PRESCALE | |||||||
R/W | |||||||
0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31 | INT_TEST | R/W | 0h | Interrupt Test - Test bit to the interrupt pacing blocks |
30 | INT_SEL_VEC_EN | R/W | 0h | Interrupt Select Vector Enable. 0 - in_vector is an 8-bit mask for tx_pend, rx_pend, and rx_thresh_pend. 1 - in_vector is the 3-bit encoded value of the highest interrupt channel set for tx_pend, rx_pend, and rx_thresh_pend. |
29:22 | RESERVED | NONE | 0h | Reserved |
21:16 | INT_PACE_EN | R/W | 0h | Interrupt Pacing Enable Bus. int_pace_en[0] - Enables C0_Rx_Pulse Pacing (0 is pacing bypass) int_pace_en[1] - Enables C0_Tx_Pulse Pacing (0 is pacing bypass) int_pace_en[2] - Enables C1_Rx_Pulse Pacing (0 is pacing bypass) int_pace_en[3] - Enables C1_Tx_Pulse Pacing (0 is pacing bypass) int_pace_en[4] - Enables C2_Rx_Pulse Pacing (0 is pacing bypass) int_pace_en[5] - Enables C2_Tx_Pulse Pacing (0 is pacing bypass) |
15:12 | RESERVED | NONE | 0h | Reserved |
11:0 | INT_PRESCALE | R/W | 0h | Interrupt Counter Prescaler - The number of VBUSP_CLK periods in 4us. |