SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
CPDMA THost Free Buffer Count Register
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Instance Name | Physical Address |
---|---|
CPSW0 | 5283 40F4h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
NONE | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
NONE | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
TH5_FREEBUFFER | |||||||
R/W | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TH5_FREEBUFFER | |||||||
R/W | |||||||
0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:16 | RESERVED | NONE | 0h | Reserved |
15:0 | TH5_FREEBUFFER | R/W | 0h | This field contains the count of host free buffers available. The th(0..7)_pendthresh value is compared with this field to determine if the THost threshold pending interrupt should be asseted (if enabled). This is a write to increment field. This field rolls over to zero on overflow. If THost threshold pending interrupts are used, the host must initialize this field to the number of available buffers (one register per channel). The port decrements (by the number of buffers in the frame) the associated channel register for each frame. This is a write to increment field. The host must write this field with the number of buffers that have been freed due to host processing. |