SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Clear Output Drive State Register.
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Instance Name | Physical Address |
---|---|
GPIO0 | 5200 0094h |
GPIO1 | 5200 1094h |
GPIO2 | 5200 2094h |
GPIO3 | 5200 3094h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
CLR7 | |||||||
R/W1TC | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
CLR7 | |||||||
R/W1TC | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
CLR6 | |||||||
R/W1TC | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CLR6 | |||||||
R/W1TC | |||||||
0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:16 | CLR7 | R/W1TC | 0h | Writing 1 clears the output drive state of GPIO. Reading it returns the output drive state. |
15:0 | CLR6 | R/W1TC | 0h | Writing 1 clears the output drive state of GPIO. Reading it returns the output drive state. |