SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

2.2.111.1 ICSSM_PR1_CFG_SLV_CGR_REG Register (Offset = 10h) [reset = A0324900h]

cgr Register

Table 4-643 Instance Table

Instance Name	Physical Address
ICSSM0	4802 6010h

Figure 4-305 ICSSM_PR1_CFG_SLV_CGR_REG Name Register

Table 4-644 ICSSM_PR1_CFG_SLV_CGR_REG Register Field Descriptions

Bit	Field	Type	Reset	Description
31	ICSS_STOP_ACK	R/W	1h
30	ICSS_STOP_REQ	R	0h
29	ICSS_PWR_IDLE	R/W	1h
28:22	RESERVED	NONE	0h	Reserved
21	BOTTOM_HALF_CLK_GATE_EN	R/W	1h
20	TOP_HALF_CLK_GATE_EN	R/W	1h
19	AUTO_SLICE1_CLK_GATE_EN	R/W	0h
18	AUTO_SLICE0_CLK_GATE_EN	R/W	0h
17	IEP_CLK_EN	R/W	1h
16	IEP_CLK_STOP_ACK	R	0h
15	IEP_CLK_STOP_REQ	R/W	0h
14	ECAP_CLK_EN	R/W	1h
13	ECAP_CLK_STOP_ACK	R	0h
12	ECAP_CLK_STOP_REQ	R/W	0h
11	UART_CLK_EN	R/W	1h
10	UART_CLK_STOP_ACK	R	0h
9	UART_CLK_STOP_REQ	R/W	0h
8	INTC_CLK_EN	R/W	1h
7	INTC_CLK_STOP_ACK	R	0h
6	INTC_CLK_STOP_REQ	R/W	0h
5:0	RESERVED	NONE	0h	Reserved