SPRUJ70A January   2023  – March 2024 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1

 

  1.   1
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Inside the Box
    2. 1.2 Key Features and Interfaces
    3. 1.3 Thermal Compliance
    4. 1.4 Electrostatic Discharge (ESD) Compliance
  4. 2User Interfaces
    1. 2.1 Power Input
      1. 2.1.1 Power Input [J24] With LED for Status [LD4]
      2. 2.1.2 Power Budget Considerations
    2. 2.2 User Inputs
      1. 2.2.1 Board Configuration Settings [SW2]
      2. 2.2.2 Reset Pushbutton [SW3]
      3. 2.2.3 User Pushbutton [SW1] With User LED Indication [LD5]
    3. 2.3 Standard Interfaces
      1. 2.3.1 UART-Over-USB [J6] With LED for Status [LD1]
      2. 2.3.2 Gigabit Ethernet [J10] With Integrated LEDs for Status
      3. 2.3.3 On-Board JTAG/Emulator [J13] with optional External Interface [J15]
      4. 2.3.4 USB3.1 Gen1 Interfaces [J11] [J14]
      5. 2.3.5 Stacked DisplayPort and HDMI Type A [J16]
      6. 2.3.6 PCIe Connector [J3] for PCIe Card Modules
      7. 2.3.7 M.2 Key M Connector [J12] for SSD Modules
      8. 2.3.8 M.2 Key E Connector [J23] for Wi-Fi Networking Modules
      9. 2.3.9 MicroSD Card Cage [J32]
    4. 2.4 Expansion Interfaces
      1. 2.4.1 Heatsink [ACC] With [J22] Fan Header
      2. 2.4.2 CAN-FD Connector(s) [J4] [J5] [J8] [J9]
      3. 2.4.3 Expansion Header [J27]
      4. 2.4.4 Camera Interface, 22-Pin Flex Connectors [J1] [J2]
      5. 2.4.5 Camera Interface, 40-Pin High Speed [J31] [J30]
      6. 2.4.6 Automation and Control Connector [J17]
  5. 3Circuit Details
    1. 3.1 Top Level Diagram
    2. 3.2 Interface Mapping
    3. 3.3 I2C Address Mapping
    4. 3.4 GPIO Mapping
    5. 3.5 I2C GPIO Expander Mapping
    6. 3.6 Identification EEPROM
  6. 4Revision History

Automation and Control Connector [J17]

The EVM supports an interface to allow for automated control of the system, including functions like on/off, reset, and boot mode settings.

Table 2-15 Test Automation Interface Pin Definition [J25]
Pin Pin Name Description (Processor Pin #) Dir
1 Power Power,3.3V Output
2 Power Power,3.3V Output
3 Power Power,3.3V Output
4-6 <open> N/A
7 GND Ground
8-15 <open> N/A
16 GND Ground
17-24 <open> N/A
25 GND Ground
26 POWERDOWNz SK Power Down Input
27 PORz SK Power-On/Cold Reset Input
28 RESETz SK Warm Reset Input
29 <open> N/A
30 INT1z MCU_ADC1_AIN0 (Y38) Input
31 INT2z MCU_ADC1_AIN1 (Y34) Bi-Dir
32 BOOTMODE_CNTL# NA N/A
33 BOOTMODE_RSTz Bootmode Buffer Reset Input
34 GND Ground
35 <open> N/A
36 I2C_SCL I2C Bus #0, Clock (AN36) Bi-Dir
37 BOOTMODE_SCL Bootmode Buffer I2C Clock Input
38 I2C_SDA I2C Bus #0, Data (AP37) Bi-Dir
39 BOOTMODE_SDA Bootmode Buffer I2C Data Bi-Dir
40-42 GND Ground