SPRUJE4B August   2024  – December 2024 F29H850TU , F29H859TU-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1  Quick Start Setup
      1. 2.1.1 Configuration 1: Stand-alone Configuration
      2. 2.1.2 Configuration 2: C2000 controlCARD Backward Compatibility Configuration
      3. 2.1.3 Configuration 3: Baseboard Configuration
    2. 2.2  Design Details
      1. 2.2.1 Power Tree
      2. 2.2.2 Clocking
      3. 2.2.3 Reset
      4. 2.2.4 Board ID EEPROM
    3. 2.3  Power Requirements
    4. 2.4  Configuration Options
      1. 2.4.1 Boot Mode Selection
      2. 2.4.2 ADC Voltage Reference Selection
      3. 2.4.3 MCAN-A Boot Support
      4. 2.4.4 FSI DLT Support
      5. 2.4.5 EtherCAT PHY Clock Selection
    5. 2.5  Header Information
      1. 2.5.1 Baseboard Headers (J1, J2, J3)
      2. 2.5.2 XDS Debug Header (J4)
      3. 2.5.3 DLT Header (J5)
    6. 2.6  Push Buttons
    7. 2.7  User LEDs
    8. 2.8  Debug Information
    9. 2.9  Test Points
    10. 2.10 Best Practices
  8. 3Software
    1. 3.1 Software Description
    2. 3.2 Software Installation
    3. 3.3 Software Development
    4. 3.4 Developing an Application
  9. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  10. 5Additional Information
    1. 5.1 Known Hardware or Software Issues
      1. 5.1.1 EVM Usage Notes
      2. 5.1.2 EVM Advisories
    2. 5.2 Trademarks
  11. 6References
  12. 7Revision History

2.4.5 EtherCAT PHY Clock Selection

The controlSOM provides two EtherCAT PHY clock outputs, ECAT_PHY0_CLK and ECAT_PHY1_CLK. By default, these clocks are sourced from a 25MHz BAW oscillator (Y1). These clocks can also be sourced from the ESC_PHY_CLK on the F29H85x device. An optional resistor configuration is included source for the EtherCAT PHY clocks from the GPIO54/ESC_PHY_CLK output on the F29H85x device. To enable this option, follow the instructions on Table 2-9. Refer to the F29H85x and F29P58x Real-Time Microcontrollers data sheet for more information on ESC_PHY_CLK.

Table 2-9 EtherCAT PHY Clock Source Selection

Mode

Resistor Configuration

On-board LVCMOS 25MHz oscillator (Y1) (default)

Populate all 0-ohm resistors on R32 and R97.

Remove all resistors on R31 and R35.

Device ESC_PHY_CLK (GPIO54)

Remove all resistors on R32 and R97.

Populate all 0-ohm resistors on R31 and R35.