SPRUJE4B August   2024  – December 2024 F29H850TU , F29H859TU-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1  Quick Start Setup
      1. 2.1.1 Configuration 1: Stand-alone Configuration
      2. 2.1.2 Configuration 2: C2000 controlCARD Backward Compatibility Configuration
      3. 2.1.3 Configuration 3: Baseboard Configuration
    2. 2.2  Design Details
      1. 2.2.1 Power Tree
      2. 2.2.2 Clocking
      3. 2.2.3 Reset
      4. 2.2.4 Board ID EEPROM
    3. 2.3  Power Requirements
    4. 2.4  Configuration Options
      1. 2.4.1 Boot Mode Selection
      2. 2.4.2 ADC Voltage Reference Selection
      3. 2.4.3 MCAN-A Boot Support
      4. 2.4.4 FSI DLT Support
      5. 2.4.5 EtherCAT PHY Clock Selection
    5. 2.5  Header Information
      1. 2.5.1 Baseboard Headers (J1, J2, J3)
      2. 2.5.2 XDS Debug Header (J4)
      3. 2.5.3 DLT Header (J5)
    6. 2.6  Push Buttons
    7. 2.7  User LEDs
    8. 2.8  Debug Information
    9. 2.9  Test Points
    10. 2.10 Best Practices
  8. 3Software
    1. 3.1 Software Description
    2. 3.2 Software Installation
    3. 3.3 Software Development
    4. 3.4 Developing an Application
  9. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  10. 5Additional Information
    1. 5.1 Known Hardware or Software Issues
      1. 5.1.1 EVM Usage Notes
      2. 5.1.2 EVM Advisories
    2. 5.2 Trademarks
  11. 6References
  12. 7Revision History

2.5.2 XDS Debug Header (J4)

The XDS debug header (J4) provides debug access to the F29H85X-SOM-EVM. This header is used when the controlSOM is used in Section 2.1.1. The XDS debug header is compatible with the XDS110ISO-EVM. Table 2-10 provides a pinout of the J4 header.

CAUTION:

The XDS debug header (J4) is only compatible with the XDS110ISO-EVM. Do not plug in any other debug probe directly into this header. See Section 2.8 for information on using other debug probes with the controlSOM.

Table 2-10 XDS Debug Header (J4) Pinout

EVM Connection

Function

Pin

Pin

Function

EVM Connection

VSYS_3V3_LDO1

IO_TGT_V

1

2

GND

GND

TMS

MCU_TMS

3

4

MCU_TCK

TCK

TDI

MCU_TDI

5

6

MCU_TDO

TDO

GND

GND

7

8

KEY

NC

UART0_RXD

MCU_SCI_RX

9

10

MCU_SCI_TX

UART0_TXD

I2C0_SDA

EE_I2CSDA

11

12

EE_I2CSCL

I2C0_SCL

SPI3_CLK

DAC_SPI_SCLK

13

14

DAC_SPI_PICO

SPI3_D0

SPI3_D1

DAC_SPI_POCI

15

16

DAC_SPI_PTE

SPI3_CS0