SPRUJF1 November   2024 AM2612

ADVANCE INFORMATION  

  1.   1
  2.   Description
  3.   Key Features
  4. 1LaunchPad Module Overview
    1. 2.1 Introduction
    2. 2.2 Preface: Read This First
      1. 2.2.1 If You Need Assistance
      2. 2.2.2 Important Usage Notes
    3. 2.3 Kit Contents
    4. 2.4 Device Information
      1. 2.4.1 System Architecture Overview
      2. 2.4.2 Security
      3. 2.4.3 Compliance
      4. 2.4.4 BoosterPacks
      5. 2.4.5 Component Identification
  5. 2Hardware Description
    1. 3.1  Board Setup
      1. 3.1.1 Power Requirements
        1. 3.1.1.1 Power Input Using USB Type-C Connector
        2. 3.1.1.2 Power Status LEDs
        3. 3.1.1.3 Power Tree
      2. 3.1.2 Push Buttons
      3. 3.1.3 Boot mode Selection
      4. 3.1.4 IO Expander
    2. 3.2  Functional Block Diagram
    3. 3.3  GPIO Mapping
    4. 3.4  Reset
    5. 3.5  Clock
    6. 3.6  Memory Interfaces
      1. 3.6.1 OSPI
      2. 3.6.2 Board ID EEPROM
    7. 3.7  Ethernet Interface
      1. 3.7.1 Ethernet PHY Add-on Board connector #0 - CPSW RGMII/ICSSM
      2. 3.7.2 Ethernet PHY Add-on Board connector #1 - CPSW RGMII/ICSSM
    8. 3.8  I2C
    9. 3.9  Industrial Application LEDs
    10. 3.10 SPI
    11. 3.11 UART
    12. 3.12 MCAN
    13. 3.13 FSI
    14. 3.14 JTAG
    15. 3.15 TIVA and Test Automation Pin Mapping
    16. 3.16 LIN
    17. 3.17 ADC and DAC
    18. 3.18 EQEP and SDFM
    19. 3.19 EPWM
    20. 3.20 USB
    21. 3.21 BoosterPack Headers
  6. 3Known Issues and modifications done on LP-AM261 RevE1
    1. 4.1 TA_POWERDOWNz pulled up by VSYS_TA_3V3 which is powered by VSYS_3V3
    2. 4.2 USB2.0_MUX_SEL0 pulled up by R355
    3. 4.3 MDIO and MDC of PRU0-ICSS0 needs to be routed to both Ethernet PHYs
    4. 4.4 AM261_RGMII1_RXLINK and AM261_RGMII2_RXLINK to be connected to GPIO
  7. 4Additional Information
    1.     Trademarks
    2. 5.1 Sitara MCU+ Academy
  8. 5References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design
    3. 6.3 Related Documentation From Texas Instruments
  9. 6Revision History

2.21 BoosterPack Headers

AM261x AM261x LaunchPad BoosterPack Pinout Figure 2-29 AM261x LaunchPad BoosterPack Pinout

Note: This pinout represents the default signals mapped to the BoosterPack Header. Additional signal options for each header are available through Pinmux Mapping. Two signals for one pin represents an externally muxed option

The AM261x LaunchPad supports two fully independent BoosterPack XL connectors. BoosterPack site #1 (J1/J3, J2/J4) is located in between the OSPI0 Flash and the micro-B USB Connector. BoosterPack site #2 (J5/J7, J6/J8) is located in between the OSPI0 Flash and the Ethernet port connectors. Each GPIO has multiple functions available through the GPIO mux. The signals connected from the SoC to the BoosterPack headers include:

  • Various ADC inputs
  • DAC outputs
  • UART3 and UART5
  • Various GPIO signals
  • SPI0 and SPI2
  • I2C0 and I2C1
  • Various EPWM channels
  • LIN1 and LIN2
  • MCAN0 and MCAN1

BoosterPack Modes

The AM261x LaunchPad is intended to be compatible with mainly the below 4 Booster Packs, which have different pin out.

Thus the LP-AM261x uses different Muxes to enable selection of different AM261x nets to be brought out on the Booster Pack Headers as per different modes as shown below Table.

The modes of the BoosterPack are controlled using select lines with nets BP_MUX_SW_S1 and BP_MUX_SW_S0 as per the schematic.

When the "Selected Net" is blank, it means that pin has no muxing and the only single net(in the Booster Pack Net Name) is always selected.

  • Mode 00 enables Standard LaunchPad BoosterPack Connections and details are captured in below tables

Table 2-14 Mode 00 : Standard LaunchPad BoosterPack (J1/J3)
Selected net BoosterPack Net Name J1 J3 BoosterPack Net Name Selected net
VSYS_3V3_BP VSYS_3V3_BP 1 21 VSYS_5V0_BP_1 VSYS_5V0_BP_1
ADC0_AIN1 ADC0_AIN1 2 22 GND GND
UART3_RXD UART3_RXD 3 23 ADC0_AIN0 ADC0_AIN0
UART3_TXD UART3_TXD 4 24 ADC1_AIN0 ADC1_AIN0
PR1_PRU1_GPIO9 PR1_PRU1_GPIO9 5 25 ADC2_AIN0 ADC2_AIN0
ADC0_AIN3 ADC0_AIN3 6 26 ADC0_AIN4 ADC0_AIN4
SPI0_CLK SPI0_CLK/PR1_PRU1_GPIO16 7 27 ADC1_AIN4 ADC1_AIN4
PR1_PRU1_GPIO11 PR1_PRU1_GPIO11 8 28 ADC2_AIN4 ADC2_AIN4
I2C0_SCL I2C0_SCL/PR1_PRU1_GPIO10 9 29 DAC_OUT/ADC0_AIN6 DAC_OUT
I2C0_SDA I2C0_SDA/PR1_PRU1_GPIO0 10 30 DAC_OUT/ADC1_AIN6 DAC_OUT
Table 2-15 Mode 00 : Standard LaunchPad BoosterPack (J2/J4)
Selected net BoosterPack Net Name J2 J4 BoosterPack Net Name Selected net
EPWM2_A EPWM2_A 40 20 GND GND
EPWM2_B EPWM2_B 39 19 SPI0_CS0/PR1_PRU1_GPIO3 SPI0_CS0
EPWM3_A EPWM3_A 38 18 PR1_PRU1_GPIO12 PR1_PRU1_GPIO12
EPWM3_B EPWM3_B 37 17 PR1_PRU1_GPIO4 PR1_PRU1_GPIO4
EPWM4_A EPWM4_A 36 16 PORZ PORZ
EPWM4_B EPWM4_B 35 15 SPI0_D0/PR1_PRU1_GPIO13 SPI0_D0
LIN1_TXD LIN1_TXD 34 14 SPI0_D1/PR1_PRU1_GPIO10 SPI0_D1
LIN1_RXD LIN1_RXD/PR1_PRU1_GPIO0 33 13 PR1_PRU1_GPIO5 PR1_PRU1_GPIO5
MCAN0_TX MCAN0_TX/PR1_PRU1_GPIO1 32 12 PR1_PRU1_GPIO15 PR1_PRU1_GPIO15
MCAN0_RX MCAN0_RX/PR1_PRU1_GPIO2 31 11 PR1_PRU0_GPIO0 PR1_PRU0_GPIO0
Table 2-16 Mode 00 : Standard LaunchPad BoosterPack (J5/J7)
Selected net BoosterPack Net Name J5 J7 BoosterPack Net Name Selected net
VSYS_3V3_BP VSYS_3V3_BP 41 61 VSYS_5V0_BP_2 VSYS_5V0_BP_2
ADC1_AIN1 ADC1_AIN1 42 62 GND GND
UART5_RXD UART5_RXD/PR1_PRU1_GPIO8 43 63 ADC0_AIN2/GPIO46 ADC0_AIN2
PR1_PRU1_GPIO2 UART5_TXD/PR1_PRU1_GPIO7 44 64 ADC1_AIN2/GPIO90 ADC1_AIN2
PR1_PRU1_GPIO19 PR1_PRU1_GPIO19 45 65 ADC2_AIN2/GPIO106 ADC2_AIN2
ADC1_AIN3 ADC1_AIN3 46 66 ADC0_AIN5 ADC0_AIN5
SPI2_CLK SPI2_CLK 47 67 ADC1_AIN5/PR1_PRU0_GPIO1 ADC1_AIN5
PR1_PRU1_GPIO6 PR1_PRU1_GPIO6 48 68 ADC2_AIN5/PR1_PRU0_GPIO2 ADC2_AIN5
I2C1_SCL I2C1_SCL/GPIO137 49 69 DAC_OUT/PR1_PRU0_GPIO6/ADC2_AIN3 DAC_OUT
I2C1_SDA I2C1_SDA/GPIO136 50 70 DAC_OUT/PR1_PRU1_GPIO5/ADC2_AIN6 DAC_OUT
Table 2-17 Mode 00 : Standard LaunchPad BoosterPack (J6/J8)
Selected net BoosterPack Net Name J6 J8 BoosterPack Net Name Selected net
EPWM5_A EPWM5_A 80 60 GND GND
EPWM5_B EPWM5_B 79 59 SPI2_CS1 SPI2_CS1
EPWM6_A EPWM6_A 78 58 SPI2_CS0 SPI2_CS0
EPWM6_B EPWM6_B 77 57 PR1_PRU0_GPIO8 PR1_PRU0_GPIO8
EPWM7_A EPWM7_A 76 56 PORZ PORZ
EPWM7_B EPWM7_B 75 55 SPI2_D0 SPI2_D0
LIN2_TXD LIN2_TXD 74 54 SPI2_D1 SPI2_D1
LIN2_RXD LIN2_RXD 73 53 GPIO6 GPIO6
MCAN1_TX MCAN1_TX/PR1_PRU0_GPIO7 72 52 GPIO5 GPIO5
MCAN1_RX MCAN1_RX/PR1_PRU0_GPIO9 71 51 GPIO1 GPIO1
  • Mode 01 enables BP-AM2BLDCSERVO BoosterPack Connections and details are captured in below tables.
Table 2-18 Mode 01: BP-AM2BLDCSERVO (J1/J3)
Selected net BoosterPack Net Name J1 J3 BoosterPack Net Name Selected net
VSYS_3V3_BP VSYS_3V3_BP 1 21 VSYS_5V0_BP_1 VSYS_5V0_BP_1
ADC0_AIN1 ADC0_AIN1 2 22 GND GND
UART3_RXD UART3_RXD 3 23 ADC0_AIN0 ADC0_AIN0
UART3_TXD UART3_TXD 4 24 ADC1_AIN0 ADC1_AIN0
PR1_PRU1_GPIO9 PR1_PRU1_GPIO9 5 25 ADC2_AIN0 ADC2_AIN0
ADC0_AIN3 ADC0_AIN3 6 26 ADC0_AIN4 ADC0_AIN4
PR1_PRU1_GPIO16 SPI0_CLK/PR1_PRU1_GPIO16 7 27 ADC1_AIN4 ADC1_AIN4
PR1_PRU1_GPIO11 PR1_PRU1_GPIO11 8 28 ADC2_AIN4 ADC2_AIN4
PR1_PRU1_GPIO10 I2C0_SCL/PR1_PRU1_GPIO10 9 29 DAC_OUT/ADC0_AIN6 ADC0_AIN6
PR1_PRU1_GPIO0 I2C0_SDA/PR1_PRU1_GPIO0 10 30 DAC_OUT/ADC1_AIN6 ADC1_AIN6
Table 2-19 Mode 01 : BP-AM2BLDCSERVO (J2/J4)
Selected net BoosterPack Net Name J2 J4 BoosterPack Net Name Selected net
EPWM2_A EPWM2_A 40 20 GND GND
EPWM2_B EPWM2_B 39 19 SPI0_CS0/PR1_PRU1_GPIO3 PR1_PRU1_GPIO3
EPWM3_A EPWM3_A 38 18 PR1_PRU1_GPIO12 PR1_PRU1_GPIO12
EPWM3_B EPWM3_B 37 17 PR1_PRU1_GPIO4 PR1_PRU1_GPIO4
EPWM4_A EPWM4_A 36 16 PORZ PORZ
EPWM4_B EPWM4_B 35 15 SPI0_D0/PR1_PRU1_GPIO13 PR1_PRU1_GPIO13
LIN1_TXD LIN1_TXD 34 14 SPI0_D1/PR1_PRU1_GPIO10 PR1_PRU1_GPIO10
PR1_PRU1_GPIO0 LIN1_RXD/PR1_PRU1_GPIO0 33 13 PR1_PRU1_GPIO5 PR1_PRU1_GPIO5
PR1_PRU1_GPIO1 MCAN0_TX/PR1_PRU1_GPIO1 32 12 PR1_PRU1_GPIO15 PR1_PRU1_GPIO15
PR1_PRU1_GPIO2 MCAN0_RX/PR1_PRU1_GPIO2 31 11 PR1_PRU0_GPIO0 PR1_PRU0_GPIO0
Table 2-20 Mode 01 : BP-AM2BLDCSERVO (J5/J7)
Selected net BoosterPack Net Name J5 J7 BoosterPack Net Name Selected net
VSYS_3V3_BP VSYS_3V3_BP 41 61 VSYS_5V0_BP_2 VSYS_5V0_BP_2
ADC1_AIN1 ADC1_AIN1 42 62 GND GND
LIN1_TXD/PR1_PRU1_GPIO8 UART5_RXD/PR1_PRU1_GPIO8 43 63 ADC0_AIN2/GPIO46 ADC0_AIN2
PR1_PRU1_GPIO7 UART5_TXD/PR1_PRU1_GPIO7 44 64 ADC1_AIN2/GPIO90 ADC1_AIN2
PR1_PRU1_GPIO19 PR1_PRU1_GPIO19 45 65 ADC2_AIN2/GPIO106 ADC2_AIN2
ADC1_AIN3 ADC1_AIN3 46 66 ADC0_AIN5 ADC0_AIN5
SPI2_CLK SPI2_CLK 47 67 ADC1_AIN5/PR1_PRU0_GPIO1 PR1_PRU0_GPIO1
PR1_PRU1_GPIO6 PR1_PRU1_GPIO6 48 68 ADC2_AIN5/PR1_PRU0_GPIO2 PR1_PRU0_GPIO2
I2C1_SCL I2C1_SCL/GPIO137 49 69 DAC_OUT/PR1_PRU0_GPIO6/ADC2_AIN3 PR1_PRU0_GPIO6
I2C1_SDA I2C1_SDA/GPIO136 50 70 DAC_OUT/PR1_PRU1_GPIO5/ADC2_AIN6 PR1_PRU0_GPIO5
Table 2-21 Mode 01 : BP-AM2BLDCSERVO (J6/J8)
Selected net BoosterPack Net Name J6 J8 BoosterPack Net Name Selected net
EPWM5_A EPWM5_A 80 60 GND GND
EPWM5_B EPWM5_B 79 59 SPI2_CS1 SPI2_CS1
EPWM6_A EPWM6_A 78 58 SPI2_CS0 SPI2_CS0
EPWM6_B EPWM6_B 77 57 PR1_PRU0_GPIO8 PR1_PRU0_GPIO8
EPWM7_A EPWM7_A 76 56 PORZ PORZ
EPWM7_B EPWM7_B 75 55 SPI2_D0 SPI2_D0
LIN2_TXD LIN2_TXD 74 54 SPI2_D1 SPI2_D1
LIN2_RXD LIN2_RXD 73 53 GPIO6 GPIO6
PR1_PRU0_GPIO7 MCAN1_TX/PR1_PRU0_GPIO7 72 52 GPIO5 GPIO5
PR1_PRU0_GPIO9 MCAN1_RX/PR1_PRU0_GPIO9 71 51 GPIO1 GPIO1
  • Mode 10 enables BOOSTXL-IOLINKM-8 BoosterPack Connections and details are captured in below tables
Table 2-22 Mode 10: BOOSTXL-IOLINKM-8 (J1/J3)
Selected net BoosterPack Net Name J1 J3 BoosterPack Net Name Selected net
VSYS_3V3_BP VSYS_3V3_BP 1 21 VSYS_5V0_BP_1 VSYS_5V0_BP_1
ADC0_AIN1 ADC0_AIN1 2 22 GND GND
UART3_RXD UART3_RXD 3 23 ADC0_AIN0 ADC0_AIN0
UART3_TXD UART3_TXD 4 24 ADC1_AIN0 ADC1_AIN0
PR1_PRU1_GPIO9 PR1_PRU1_GPIO9 5 25 ADC2_AIN0 ADC2_AIN0
ADC0_AIN3 ADC0_AIN3 6 26 ADC0_AIN4 ADC0_AIN4
PR1_PRU1_GPIO16 SPI0_CLK/PR1_PRU1_GPIO16 7 27 ADC1_AIN4 ADC1_AIN4
PR1_PRU1_GPIO11 PR1_PRU1_GPIO11 8 28 ADC2_AIN4 ADC2_AIN4
I2C0_SCL I2C0_SCL/PR1_PRU1_GPIO10 9 29 DAC_OUT/ADC0_AIN6 DAC_OUT
I2C0_SDA I2C0_SDA/PR1_PRU1_GPIO0 10 30 DAC_OUT/ADC1_AIN6 DAC_OUT
Table 2-23 Mode 10 : BOOSTXL-IOLINKM-8 (J2/J4)
Selected net BoosterPack Net Name J2 J4 BoosterPack Net Name Selected net
EPWM2_A EPWM2_A 40 20 GND GND
EPWM2_B EPWM2_B 39 19 SPI0_CS0/PR1_PRU1_GPIO3 PR1_PRU1_GPIO3
EPWM3_A EPWM3_A 38 18 PR1_PRU1_GPIO12 PR1_PRU1_GPIO12
EPWM3_B EPWM3_B 37 17 PR1_PRU1_GPIO4 PR1_PRU1_GPIO4
EPWM4_A EPWM4_A 36 16 PORZ PORZ
EPWM4_B EPWM4_B 35 15 SPI0_D0/PR1_PRU1_GPIO13 PR1_PRU1_GPIO13
LIN1_TXD LIN1_TXD 34 14 SPI0_D1/PR1_PRU1_GPIO10 PR1_PRU1_GPIO10
PR1_PRU1_GPIO0 LIN1_RXD/PR1_PRU1_GPIO0 33 13 PR1_PRU1_GPIO5 PR1_PRU1_GPIO5
PR1_PRU1_GPIO1 MCAN0_TX/PR1_PRU1_GPIO1 32 12 PR1_PRU1_GPIO15 PR1_PRU1_GPIO15
PR1_PRU1_GPIO2 MCAN0_RX/PR1_PRU1_GPIO2 31 11 PR1_PRU0_GPIO0 PR1_PRU0_GPIO0
Table 2-24 Mode 10 : BOOSTXL-IOLINKM-8 (J5/J7)
Selected net BoosterPack Net Name J5 J7 BoosterPack Net Name Selected net
VSYS_3V3_BP VSYS_3V3_BP 41 61 VSYS_5V0_BP_2 VSYS_5V0_BP_2
ADC1_AIN1 ADC1_AIN1 42 62 GND GND
LIN1_TXD/PR1_PRU1_GPIO8 UART5_RXD/PR1_PRU1_GPIO8 43 63 ADC0_AIN2/GPIO46 GPIO46
PR1_PRU1_GPIO7 UART5_TXD/PR1_PRU1_GPIO7 44 64 ADC1_AIN2/GPIO90 GPIO90
PR1_PRU1_GPIO19 PR1_PRU1_GPIO19 45 65 ADC2_AIN2/GPIO106 GPIO106
ADC1_AIN3 ADC1_AIN3 46 66 ADC0_AIN5 ADC0_AIN5
SPI2_CLK SPI2_CLK 47 67 ADC1_AIN5/PR1_PRU0_GPIO1 PR1_PRU0_GPIO1
PR1_PRU1_GPIO6 PR1_PRU1_GPIO6 48 68 ADC2_AIN5/PR1_PRU0_GPIO2 PR1_PRU0_GPIO2
GPIO137 I2C1_SCL/GPIO137 49 69 DAC_OUT/PR1_PRU0_GPIO6/ADC2_AIN3 PR1_PRU0_GPIO6
GPIO136 I2C1_SDA/GPIO136 50 70 DAC_OUT/PR1_PRU1_GPIO5/ADC2_AIN6 PR1_PRU0_GPIO5
Table 2-25 Mode 10 : BOOSTXL-IOLINKM-8 (J6/J8)
Selected net BoosterPack Net Name J6 J8 BoosterPack Net Name Selected net
EPWM5_A EPWM5_A 80 60 GND GND
EPWM5_B EPWM5_B 79 59 SPI2_CS1 SPI2_CS1
EPWM6_A EPWM6_A 78 58 SPI2_CS0 SPI2_CS0
EPWM6_B EPWM6_B 77 57 PR1_PRU0_GPIO8 PR1_PRU0_GPIO8
EPWM7_A EPWM7_A 76 56 PORZ PORZ
EPWM7_B EPWM7_B 75 55 SPI2_D0 SPI2_D0
LIN2_TXD LIN2_TXD 74 54 SPI2_D1 SPI2_D1
LIN2_RXD LIN2_RXD 73 53 GPIO6 GPIO6
PR1_PRU0_GPIO7 MCAN1_TX/PR1_PRU0_GPIO7 72 52 GPIO5 GPIO5
PR1_PRU0_GPIO9 MCAN1_RX/PR1_PRU0_GPIO9 71 51 GPIO1 GPIO1
  • Mode 11 enables Standard C2000 DRVx BoosterPack Connections and details are captured in below tables
Table 2-26 Mode 11 : Standard C2000 DRVx Booster Packs (J1/J3)
Selected net BoosterPack Net Name J1 J3 BoosterPack Net Name Selected net
VSYS_3V3_BP VSYS_3V3_BP 1 21 VSYS_5V0_BP_1 VSYS_5V0_BP_1
ADC0_AIN1 ADC0_AIN1 2 22 GND GND
UART3_RXD UART3_RXD 3 23 ADC0_AIN0 ADC0_AIN0
UART3_TXD UART3_TXD 4 24 ADC1_AIN0 ADC1_AIN0
PR1_PRU1_GPIO9 PR1_PRU1_GPIO9 5 25 ADC2_AIN0 ADC2_AIN0
ADC0_AIN3 ADC0_AIN3 6 26 ADC0_AIN4 ADC0_AIN4
SPI0_CLK SPI0_CLK/PR1_PRU1_GPIO16 7 27 ADC1_AIN4 ADC1_AIN4
PR1_PRU1_GPIO11 PR1_PRU1_GPIO11 8 28 ADC2_AIN4 ADC2_AIN4
PR1_PRU1_GPIO10 I2C0_SCL/PR1_PRU1_GPIO10 9 29 DAC_OUT/ADC0_AIN6 ADC0_AIN6
PR1_PRU1_GPIO0 I2C0_SDA/PR1_PRU1_GPIO0 10 30 DAC_OUT/ADC1_AIN6 ADC1_AIN6
Table 2-27 Mode 11 : Standard C2000 DRVx Booster Packs (J2/J4)
Selected net BoosterPack Net Name J2 J4 BoosterPack Net Name Selected net
EPWM2_A EPWM2_A 40 20 GND GND
EPWM2_B EPWM2_B 39 19 SPI0_CS0/PR1_PRU1_GPIO3 SPI0_CS0
EPWM3_A EPWM3_A 38 18 PR1_PRU1_GPIO12 PR1_PRU1_GPIO12
EPWM3_B EPWM3_B 37 17 PR1_PRU1_GPIO4 PR1_PRU1_GPIO4
EPWM4_A EPWM4_A 36 16 PORZ PORZ
EPWM4_B EPWM4_B 35 15 SPI0_D0/PR1_PRU1_GPIO13 SPI0_D0
LIN1_TXD LIN1_TXD 34 14 SPI0_D1/PR1_PRU1_GPIO10 SPI0_D1
LIN1_RXD LIN1_RXD/PR1_PRU1_GPIO0 33 13 PR1_PRU1_GPIO5 PR1_PRU1_GPIO5
MCAN0_TX MCAN0_TX/PR1_PRU1_GPIO1 32 12 PR1_PRU1_GPIO15 PR1_PRU1_GPIO15
MCAN0_RX MCAN0_RX/PR1_PRU1_GPIO2 31 11 PR1_PRU0_GPIO0 PR1_PRU0_GPIO0
Table 2-28 Mode 11 : Standard C2000 DRVx Booster Packs (J5/J7)
Selected net BoosterPack Net Name J5 J7 BoosterPack Net Name Selected net
VSYS_3V3_BP VSYS_3V3_BP 41 61 VSYS_5V0_BP_2 VSYS_5V0_BP_2
ADC1_AIN1 ADC1_AIN1 42 62 GND GND
UART5_RXD UART5_RXD/PR1_PRU1_GPIO8 43 63 ADC0_AIN2/GPIO46 GPIO46
PR1_PRU1_GPIO2 UART5_TXD/PR1_PRU1_GPIO7 44 64 ADC1_AIN2/GPIO90 GPIO90
PR1_PRU1_GPIO19 PR1_PRU1_GPIO19 45 65 ADC2_AIN2/GPIO106 GPIO106
ADC1_AIN3 ADC1_AIN3 46 66 ADC0_AIN5 ADC0_AIN5
SPI2_CLK SPI2_CLK 47 67 ADC1_AIN5/PR1_PRU0_GPIO1 ADC1_AIN5
PR1_PRU1_GPIO6 PR1_PRU1_GPIO6 48 68 ADC2_AIN5/PR1_PRU0_GPIO2 ADC2_AIN5
GPIO137 I2C1_SCL/GPIO137 49 69 DAC_OUT/PR1_PRU0_GPIO6/ADC2_AIN3 ADC2_AIN3
GPIO136 I2C1_SDA/GPIO136 50 70 DAC_OUT/PR1_PRU1_GPIO5/ADC2_AIN6 ADC2_AIN6
Table 2-29 Mode 11 : Standard C2000 DRVx Booster Packs (J6/J8)
Selected net BoosterPack Net Name J6 J8 BoosterPack Net Name Selected net
EPWM5_A EPWM5_A 80 60 GND GND
EPWM5_B EPWM5_B 79 59 SPI2_CS1 SPI2_CS1
EPWM6_A EPWM6_A 78 58 SPI2_CS0 SPI2_CS0
EPWM6_B EPWM6_B 77 57 PR1_PRU0_GPIO8 PR1_PRU0_GPIO8
EPWM7_A EPWM7_A 76 56 PORZ PORZ
EPWM7_B EPWM7_B 75 55 SPI2_D0 SPI2_D0
LIN2_TXD LIN2_TXD 74 54 SPI2_D1 SPI2_D1
LIN2_RXD LIN2_RXD 73 53 GPIO6 GPIO6
MCAN1_TX MCAN1_TX/PR1_PRU0_GPIO7 72 52 GPIO5 GPIO5
MCAN1_RX MCAN1_RX/PR1_PRU0_GPIO9 71 51 GPIO1 GPIO1