Details:

When EDMA is programmed to transfer more than 32 bits of data in to McSPI Tx FIFO (32 Bytes), it stops working after transferring only first 32 bits data in to the FIFO.

This issue is observed only in “ABSYNC” mode of EDMA where the EDMA is configured such that transfer size is more than 32 bits.

When the issue happens the EDMA neither transferring the data and completing it nor raising any error as vbusp_sdone signal is not getting generated by McSPI for transaction from EDMA.

SPI RX mode is not affected this issue.

Workaround(s):

Option1: Use ASYNC mode of EDMA for McSPI TX operation

Option2: Use acnt=4, bcnt=1, ccnt=1 if ABSYNC mode is used for McSPI TX operation