Errata AM261 Sitara™ Microcontroller Silicon Revision 1.0

Abstract

This document describes the known exceptions to the functional specifications (advisories). This document may also contain usage notes. Usage notes describe situations where the device's behavior may not match presumed or documented behavior. This may include behaviors that affect device performance or functional correctness.

1 Usage Notes and Advisories Matrices

Table 1-1 lists all usage notes and the applicable silicon revision(s). Table 1-2 lists all advisories, modules affected, and the applicable silicon revision(s).

Table 1-1 Usage Notes Matrix

Module	DESCRIPTION	SILICON REVISIONS AFFECTED
		AM261
		1.0
CLOCKS	i2324 — No synchronizer present between GCM and GCD status signals	YES

Table 1-2 Advisories Matrix

MODULE	DESCRIPTION	SILICON REVISIONS AFFECTED
		AM261
		1.0
CONTROLSS	i2352 — CONTROLSS-SDFM: Dynamically Changing Threshold Settings (LLT, HLT), Filter Type, or COSR Settings Will Trigger Spurious Comparator Events	YES
CONTROLSS	i2353 — CONTROLSS-SDFM: Dynamically Changing Data Filter Settings (Such as Filter Type or DOSR) Will Trigger Spurious Data Acknowledge Events	YES
CONTROLSS	i2354 — CONTROLSS-SDFM: Two Back-to-Back Writes to SDCPARMx Register Bit Fields CEVT1SEL, CEVT2SEL, and HZEN Within Three SD-Modulator Clock Cycles can Corrupt SDFM State Machine, Resulting in Spurious Comparator Events	YES
CONTROLSS	i2356 — CONTROLSS-ADC: Interrupts may Stop if INTxCONT (Continue-to-Interrupt Mode) is not Set	YES
CONTROLSS	i2357 — CONTROLSS-ePWM: An ePWM Glitch can Occur if a Trip Remains Active at the End of the Blanking Window	YES
CONTROLSS	i2358 — CONTROLSS-ePWM: Trip Events Will Not be Filtered by the Blanking Window for the First 3 Cycles After the Start of a Blanking	YES
CONTROLSS	i2359 — CONTROLSS-CMPSS:Prescaler counter behavior different from spec when DACSOURCE is made 0 or reconfigured as 1	YES
CPSW	i2345 — CPSW: Ethernet Packet corruption occurs if CPDMA fetches a packet which spans across memory banks	YES
UART	i2310 — USART: Erroneous triggering of timeout interrupt	YES
UART	i2311 — USART: Spurious DMA Interrupts	YES
DTHE	i2428 — AES in DTHE generates extra dma request for data_in at the end of GCM encrypt	YES
SEC	i2427 — RAM SEC can cause Spurious RAM writes resulting in L2 & MBOX memory corruption	YES
USB	i2412 — USB can not generate interrupt upon DMA read/Write Access error	YES
TCM	i2411 — 128 Bytes burst access is not supported for TCM	YES
OSPI	i2383 — OSPI: 2-byte address is not supported in PHY DDR mode	YES
PBIST	i2374 — PBIST fails if clock frequency of R5SS_CORE_CLK is not same as R5FSS_CLK_SELECTED frequency	YES
OSPI	i2351 — OSPI: Direct Access Controller (DAC) does not support Continuous Read mode with NAND Flash	YES
OSPI	i2189 — OSPI: Controller PHY Tuning Algorithm	YES
CPSW	i2440 - CPSW: Host to Ethernet Timestamp Sequence ID issue	YES
CPSW	i2439 - CPSW: Host to Ethernet Timestamp Accuracy Issue	YES
ICSS	i2433 - ICSS: Reading the 64-bit IEP timer does not have a lock MSW logic when LSW is read	YES