SPRZ576 November   2024 AM2612

ADVANCE INFORMATION  

  1.   1
  2.   Abstract
  3. 1Usage Notes and Advisories Matrices
  4. 2Silicon Revision 1.0 Usage Notes and Advisories
    1. 2.1 Silicon Revision 1.0 Usage Notes
      1.      i2324
    2. 2.2 Silicon Revision 1.0 Advisories
      1.      i2189
      2.      i2310
      3.      i2311
      4.      i2345
      5.      i2351
      6.      i2352
      7.      i2353
      8.      i2354
      9.      i2356
      10.      i2357
      11.      i2358
      12.      i2359
      13.      i2374
      14.      i2383
      15.      i2411
      16.      i2412
      17.      i2427
      18.      i2428
      19.      i2433
      20.      i2439
      21.      i2440
  5. 3Trademarks
  6. 4Revision History

i2311

USART Spurious DMA Interrupts

Details:

Spurious DMA interrupts may occur when DMA is used to access TX/RX FIFO with a non-power-of-2 trigger level in the TLR register.

Workaround(s):

Use power of 2 values for TX/RX FIFO trigger levels (1, 2, 4, 8, 16, and 32).