SWCU194 March 2023 CC1314R10 , CC1354P10 , CC1354R10 , CC2674P10 , CC2674R10
The ADC connects to a FIFO that can hold up to four ADC samples. Read AUX_ANAIF:ADCFIFO to get the oldest sample. It is possible to write dummy samples to the FIFO for debug purposes. The FIFO samples are not compensated for offset and gain errors in the ADC. The user must perform the compensation manually using the factory configuration data stored during chip production, see Section 11.4. The System CPU can use the AUX_ADC TI-DriverLib module to accomplish this task.
AUX_ANAIF:ADCFIFOSTAT provides FIFO status flags such as overflow, underflow, and utilization. All FIFO status flags and the ADC-conversion-done event connect to the AUX event bus.
To recover from an overflow or underflow condition, the user must flush the FIFO and re-enable the digital ADC interface, as described in AUX_ANAIF:ADCCTL.CMD (see Section 20.8.8).
When debugging the software, showing the AUX_ANAIF_ADCFIFO register causes JTAG to read the FIFO, which pops the sample from the FIFO, and consequently the software cannot read it.