SWRZ138A July   2023  – August 2024 AWRL1432

 

  1.   1
  2. 1Introduction
  3. 2Device Nomenclature
  4. 3Device Markings
  5. 4Advisory to Silicon Variant / Revision Map
  6. 5Known Design Exceptions to Functional Specifications
    1. 5.1  ANA #51
    2. 5.2  ANA #52
    3. 5.3  DIG #1
    4. 5.4  DIG #2
    5. 5.5  DIG #3
    6. 5.6  DIG #4
    7. 5.7  DIG #5
    8. 5.8  DIG #6
    9. 5.9  DIG #7
    10. 5.10 DIG #8
    11. 5.11 DIG #9
    12. 5.12 DIG #10
    13. 5.13 DIG #14
    14. 5.14 DIG #15
    15. 5.15 DIG #16
  7. 6Trademarks
  8.   Revision History

4 Advisory to Silicon Variant / Revision Map

Table 4-1 Advisory to Silicon Variant / Revision Map
Advisory Number Advisory Title AWRL1432 AWRL1432
ES1.1 ES2.0
Analog / Millimeter Wave
ANA #51

Continuous Wave Streaming CZ mode: Sudden jump in RX output codes every 20.97152 msec

 x x
ANA #52 Slicer LDO Test LOAD (TLOAD) not disabled after startup x
Digital Subsystem
DIG #1 ePWM: Glitch during Chopper mode of operation x x
DIG #2 UART: UARTA cannot be used to wake up the sequencer from Deep Sleep Low Power Mode x
DIG #3 UART: Limited UART baud rates x x
DIG #4 RS232: AutoBaud Rate feature doesn't support trimmed RCOSC variation x x
DIG #5 Internal Bus access to SPI for data transfer not supported when SPI smart-idle mode is enabled x x
DIG #6 CRC: CRC 8-bit data width and CRC8-SAE-J1850 and CRC8-H2F possible use in CAN module is not supported x x
DIG #7 APPSS Cortex-M4 doesn't get the correct error response when cluster 3 retention memories are accessed in low-power deep-sleep powered down state x
DIG #8 Shared RAM clock gating default values x x
DIG #9 TOP_IO_MUX register space not accessible from RS232 for debug purposes x x
DIG #10 Incorrect behavior of frame stop API x x
DIG #14 Corrupted Data Store for Partial Write in Shared Memory x x
DIG #15 Boot failure, if metaimage is multiple of 2K x
DIG #16 Boot failure for images less than size 8k over SPI x x