TIDUE53I march   2018  – july 2023 TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SJ-Q1

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1  UCC21710
      2. 2.2.2  UCC5320
      3. 2.2.3  TMS320F28379D
      4. 2.2.4  AMC1305M05
      5. 2.2.5  OPA4340
      6. 2.2.6  LM76003
      7. 2.2.7  PTH08080W
      8. 2.2.8  TLV1117
      9. 2.2.9  OPA350
      10. 2.2.10 UCC14240
    3. 2.3 System Design Theory
      1. 2.3.1 Three-Phase T-Type Inverter
        1. 2.3.1.1 Architecture Overview
        2. 2.3.1.2 LCL Filter Design
        3. 2.3.1.3 Inductor Design
        4. 2.3.1.4 SiC MOSFETs Selection
        5. 2.3.1.5 Loss Estimations
        6. 2.3.1.6 Thermal Considerations
      2. 2.3.2 Voltage Sensing
      3. 2.3.3 Current Sensing
      4. 2.3.4 System Power Supplies
        1. 2.3.4.1 Main Input Power Conditioning
        2. 2.3.4.2 Isolated Bias Supplies
      5. 2.3.5 Gate Drivers
        1. 2.3.5.1 1200-V SiC MOSFETs
        2. 2.3.5.2 650-V SiC MOSFETs
        3. 2.3.5.3 Gate Driver Bias Supply
      6. 2.3.6 Control Design
        1. 2.3.6.1 Current Loop Design
        2. 2.3.6.2 PFC DC Bus Voltage Regulation Loop Design
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
        1. 3.1.1.1 Test Hardware Required
        2. 3.1.1.2 Microcontroller Resources Used on the Design (TMS320F28379D)
        3. 3.1.1.3 F28377D, F28379D Control-Card Settings
        4. 3.1.1.4 Microcontroller Resources Used on the Design (TMS320F280039C)
      2. 3.1.2 Software
        1. 3.1.2.1 Getting Started With Firmware
          1. 3.1.2.1.1 Opening the CCS project
          2. 3.1.2.1.2 Digital Power SDK Software Architecture
          3. 3.1.2.1.3 Interrupts and Lab Structure
          4. 3.1.2.1.4 Building, Loading and Debugging the Firmware
        2. 3.1.2.2 Protection Scheme
        3. 3.1.2.3 PWM Switching Scheme
        4. 3.1.2.4 ADC Loading
    2. 3.2 Testing and Results
      1. 3.2.1 Lab 1
      2. 3.2.2 Testing Inverter Operation
        1. 3.2.2.1 Lab 2
        2. 3.2.2.2 Lab 3
        3. 3.2.2.3 Lab 4
      3. 3.2.3 Testing PFC Operation
        1. 3.2.3.1 Lab 5
        2. 3.2.3.2 Lab 6
        3. 3.2.3.3 Lab 7
      4. 3.2.4 Test Setup for Efficiency
      5. 3.2.5 Test Results
        1. 3.2.5.1 PFC Mode - 230 VRMS, 400 V L-L
          1. 3.2.5.1.1 PFC Start-up – 230 VRMS, 400 L-L AC Voltage
          2. 3.2.5.1.2 Steady State Results at 230 VRMS, 400 V L-L - PFC Mode
          3. 3.2.5.1.3 Efficiency and THD Results at 220 VRMS, 50 Hz – PFC Mode
          4. 3.2.5.1.4 Transient Test With Step Load Change
        2. 3.2.5.2 PFC Mode - 120 VRMS, 208 V L-L
          1. 3.2.5.2.1 Steady State Results at 120 VRMS, 208 V-L-L - PFC Mode
          2. 3.2.5.2.2 Efficiency and THD Results at 120 VRMS - PFC Mode
        3. 3.2.5.3 Inverter Mode
          1. 3.2.5.3.1 Inverter Closed Loop Results
          2. 3.2.5.3.2 Efficiency and THD Results - Inverter Mode
          3. 3.2.5.3.3 Inverter - Transient Test
      6. 3.2.6 Open Loop Inverter Test Results
  10. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  11. 5Trademarks
  12. 6About the Authors
  13. 7Revision History
3.1.2.1.4 Building, Loading and Debugging the Firmware

To build the project, right-click on the project name and click Rebuild Project. The project builds successfully.

To load the project, first make sure in the Project Explorer the correct target configuration file is set as Active under targetConfigs (*.ccxml file). Then, click Run → Debug to launch a debugging session. In case of dual-CPU devices, a window may appear for the user to select the CPU on which the debug is to be performed. In this case, select CPU1. The project will then load on the device and the CCS debug view will become active. The code will halt at the start of the main routine.

To debug the system one would monitor the variables in the watch/expressions window. To populate this window with the correct variables, click View → Scripting Console to open the scripting console dialog box. On the upper right corner of this console, click on Open and then browse to the “setupdebugenv_lab<Number>.js” script file located inside the project folder. This will populate the watch window with the appropriate variables needed to debug the system. Enable Continuous Refresh button on the watch window to enable continuous update of values from the controller.

Real-time emulation is a special emulation feature that allows windows within Code Composer Studio to be updated while the MCU is running. This allows graphs and watch views to updated, but also allows the user to change values in watch or memory windows, and see the effect of these changes in the system without halting the processor. To enable real-time mode click on this button on the top bar of CCS <insert image>. A message box may appear. If so, select YES to enable debug events. This will set bit 1 (DGBM bit) of status register 1 (ST1) to a “0”. DGBM is the debug enable mask bit. When the DGBM bit is set to “0”, memory and register values can be passed to the host processor for updating the debugger windows.

In different labs, sometimes the currents and voltages measured or the control variables need to be verified by viewing the data in the graph window. For this Graph window can be used which in conjunction with a piece of code that runs on the controller can show a snapshot of how the values are being sensed by the controller. The values are logged by the datalogger typically in the slower ISRs. To import the graph into the CCS view select Tools => Graph => DualTime, and click Import and point to the graph1.GraphProp file inside the project folder. Two graphs will appear in CCS. Click Continuous Refresh on these graphs. A second set of graphs can also be added by importing the graph2.GraphProp file.

CPU Loading

The main control ISR with Lab 3 and Lab 7 takes approximately 54 MIPS at 50-kHz rate when running from CPU1, that is approximately 27% of the CPU when running from 200-MHz F2837x processor. This includes the ADC drivers, abc-dq0 and dq0-abc transformation, transformation, PWM generation , two current control loops, one voltage loop, and the SFRA call.