TIDUEB8C July   2018  – March 2021 TPS274160

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 LM5165
      2. 2.2.2 TLC59282
      3. 2.2.3 TPS4H160-Q1
      4. 2.2.4 INA253
      5. 2.2.5 TIOL111
    3. 2.3 System Design Theory
      1. 2.3.1 IO-Link PHY
      2. 2.3.2 Current Sink
      3. 2.3.3 Power Supply for L+
      4. 2.3.4 Power Supply
      5. 2.3.5 Pinouts
    4. 2.4 Software Frame Handler
      1. 2.4.1 PRU-ICSS IO-Link Frame-Handler
        1. 2.4.1.1 Performance Advantages and Benefits
        2. 2.4.1.2 Principle of Operation
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
      2. 3.1.2 Software
    2. 3.2 Testing and Results
      1. 3.2.1 Test Setup
      2. 3.2.2 Test Results
        1. 3.2.2.1 IO-Link Wake-Up Pulse
        2. 3.2.2.2 L+ Turnon Behavior
        3. 3.2.2.3 Current Sink on CQ
        4. 3.2.2.4 Residue Voltage
        5. 3.2.2.5 IO-Link Physical Layer Test Summary
        6. 3.2.2.6 Current Sense on Each Port
        7. 3.2.2.7 TPS4H160 Thermal Behavior
  9. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  10. 5Software Files
  11. 6Related Documentation
    1. 6.1 Trademarks
  12. 7About the Author
  13. 8Revision History

3.2.2.5 IO-Link Physical Layer Test Summary

Table 3-1 lists the physical layer test summary and results.

Table 3-1 IO-Link® Physical Layer Test
IDNameConfigurationSpecification (Clause)CommentResult
SDCI_TC_0001TCM_PHYL_INTF_ISMThe supply current at the Master port is monitored.See Section 5.3.2.3, Table 6 in IO-Link Interface and System Specification Version 1.1.22Test with 200 mA20 V: Pass
30 V: Pass
SDCI_TC_0002TCM_PHYL_INTF_ISIRMThe supply current at the Master port is monitored.Test with 500 mA20 V: Pass
30 V: Pass
SDCI_TC_0003TCM_PHYL_INTF_ILLMThe input current at C/Q at the Master port is monitored.ILLM (VIM = 5 V, VSM = 20 V): 9.77 mA Pass
ILLM (VIM = 5,1 V, VSM = 20 V): 9.77 mA Pass
ILLM (VIM = 15 V, VSM = 20 V): 10.04 mA Pass
ILLM (VIM = VSM = 20 V): 10.17 mA Pass
ILLM (VIM = 5 V, VSM = 30 V): 9.77 mA Pass
ILLM (VIM = 5,1 V, VSM = 30 V): 9.77 mA Pass
ILLM (VIM = 15 V, VSM = 30 V): 10.04 mA Pass
ILLM (VIM = VSM = 30 V): 10.43 mA Pass
SDCI_TC_0004TCM_PHYL_INTF_VREShighThe output level at the Master C/Q output is measured.VRQHM (VSM = 20 V): 1.003 V
VRQHM (VSM = 30 V): 1.002 V
Pass
SDCI_TC_0005TCM_PHYL_INTF_VRESLOWThe output level at the Master C/Q output is measured.VRQLM (VSM = 20 V): 0.984 V
VRQLM (VSM = 30 V): 0.983 V
Pass
SDCI_TC_0006TCM_PHYL_INTF_VTHHMThe digital input signal for C/Q input is monitoredSee Section 5.3.2.2, Table 5 in IO-Link Interface and System Specification Version 1.1.22VIM@VTHHM (VSM = 20 V): 11.47 V
VIM@VTHHM (VSM = 30 V): 11.47 V
Pass
SDCI_TC_0007TCM_PHYL_INTF_VTHLMThe digital input signal for C/Q input is monitoredVIM@VTHLM (VSM = 20 V): 10.75 V
VIM@VTHLM (VSM = 30 V): 10.75 V
Pass
SDCI_TC_0008TCM_PHYL_INTF_VHYSMComparison of values from SDCI_TC_0006 and SDCI_TC_0007VHYSM (VSM = 20 V): 0.72 V
VHYSM (VSM = 30 V): 0.72 V
Pass
SDCI_TC_0009TCM_PHYL_INTF_IQPKHMThe output level at the Master C/Q output is measured.VIM (VSM = 20 V): 17.4 V
VIM (VSM = 30 V): 26.4 V
Pass
SDCI_TC_0010TCM_PHYL_INTF_IQPKLMThe output level at the Master C/Q output is measured.See Section 5.3.2.3, Table 6 in IO-Link Interface and System Specification Version 1.1.22VIM (VSM = 20 V): 2.2 V
VIM (VSM = 30 V): 2.2 V
Pass
SDCI_TC_0299TCM_PHYL_INTF_VOLTRANGECQTest if working after connecting CQ to 0 V and 30 V via 1 ΩSee Section 5.3.2.2, Table 5 - VIL and VIH, in IO-Link Interface and System Specification Version 1.1.22Pass
SDCI_TC_0021TCM_PHYL_INTF_IQWUHSee Section 5.3.3.3, Table 9 in IO-Link Interface and System Specification Version 1.1.22Wake-up pulse from function generatorVIM@WURQ (VSM = 20 V): 17.3 V
VIM@WURQ (VSM = 30 V): 26.2 V
Pass
SDCI_TC_0022TCM_PHYL_INTF_TWUHWake-up pulse from function generatorTWUH@WURQ (VSM = 20 V): 80 µs
TWUH@WURQ (VSM = 30 V): 80 µs
Pass
SDCI_TC_0023TCM_PHYL_INTF_IQWULWake-up pulse from function generatorVIM@WURQ (VSM = 20 V): 2 V
VIM@WURQ (VSM = 30 V): 2.5 V
Pass
SDCI_TC_0024TCM_PHYL_INTF_TWULWake-up pulse from function generatorTWUL@WURQ (VSM = 20 V): 80 µs
TWUL@WURQ (VSM = 30 V): 80 µs
Pass