TIDUES0E June   2019  – April 2024 TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SJ-Q1

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1  UCC21710
      2. 2.2.2  UCC14141-Q1
      3. 2.2.3  AMC1311
      4. 2.2.4  AMC1302
      5. 2.2.5  OPA320
      6. 2.2.6  AMC1306M05
      7. 2.2.7  AMC1336
      8. 2.2.8  TMCS1133
      9. 2.2.9  TMS320F280039C
      10. 2.2.10 TLVM13620
      11. 2.2.11 ISOW1044
      12. 2.2.12 TPS2640
    3. 2.3 System Design Theory
      1. 2.3.1 Dual Active Bridge Analogy With Power Systems
      2. 2.3.2 Dual-Active Bridge – Switching Sequence
      3. 2.3.3 Dual-Active Bridge – Zero Voltage Switching (ZVS)
      4. 2.3.4 Dual-Active Bridge - Design Considerations
        1. 2.3.4.1 Leakage Inductor
        2. 2.3.4.2 Soft Switching Range
        3. 2.3.4.3 Effect of Inductance on Current
        4. 2.3.4.4 Phase Shift
        5. 2.3.4.5 Capacitor Selection
          1. 2.3.4.5.1 DC-Blocking Capacitors
        6. 2.3.4.6 Switching Frequency
        7. 2.3.4.7 Transformer Selection
        8. 2.3.4.8 SiC MOSFET Selection
      5. 2.3.5 Loss Analysis
        1. 2.3.5.1 SiC MOSFET and Diode Losses
        2. 2.3.5.2 Transformer Losses
        3. 2.3.5.3 Inductor Losses
        4. 2.3.5.4 Gate Driver Losses
        5. 2.3.5.5 Efficiency
        6. 2.3.5.6 Thermal Considerations
  9. 3Circuit Description
    1. 3.1 Power Stage
    2. 3.2 DC Voltage Sensing
      1. 3.2.1 Primary DC Voltage Sensing
      2. 3.2.2 Secondary DC Voltage Sensing
        1. 3.2.2.1 Secondary Side Battery Voltage Sensing
    3. 3.3 Current Sensing
    4. 3.4 Power Architecture
      1. 3.4.1 Auxiliary Power Supply
      2. 3.4.2 Gate Driver Bias Power Supply
      3. 3.4.3 Isolated Power Supply for Sense Circuits
    5. 3.5 Gate Driver Circuit
    6. 3.6 Additional Circuitry
    7. 3.7 Simulation
      1. 3.7.1 Setup
      2. 3.7.2 Running Simulations
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Required Hardware and Software
      1. 4.1.1 Hardware
      2. 4.1.2 Software
        1. 4.1.2.1 Getting Started With Software
        2. 4.1.2.2 Pin Configuration
        3. 4.1.2.3 PWM Configuration
        4. 4.1.2.4 High-Resolution Phase Shift Configuration
        5. 4.1.2.5 ADC Configuration
        6. 4.1.2.6 ISR Structure
    2. 4.2 Test Setup
    3. 4.3 PowerSUITE GUI
    4. 4.4 LABs
      1. 4.4.1 Lab 1
      2. 4.4.2 Lab 2
      3. 4.4.3 Lab 3
      4. 4.4.4 Lab 4
      5. 4.4.5 Lab 5
      6. 4.4.6 Lab 6
      7. 4.4.7 Lab 7
    5. 4.5 Test Results
      1. 4.5.1 Closed-Loop Performance
  11. 5Design Files
    1. 5.1 Schematics
    2. 5.2 Bill of Materials
    3. 5.3 Altium Project
    4. 5.4 Gerber Files
    5. 5.5 Assembly Drawings
  12. 6Related Documentation
    1. 6.1 Trademarks
  13. 7Terminology
  14. 8About the Author
  15. 9Revision History

4.1.2.2 Pin Configuration

Table 4-1 shows the key signal connections between the TMS320F280039C control card and TIDA-010054 base board.

Table 4-1 Key Peripherals for Control of the Power Stage on the Board
SIGNAL NAMEDESCRIPTIONCONNECTION TO ControlCARD (HSEC PIN)
PWM-1APrimary side leg-1 high side driveGPIO-00 (49)
PWM-1BPrimary side leg-1 low side driveGPIO-01 (51)
PWM-2APrimary side leg-2 high side driveGPIO-02 (53)
PWM-2BPrimary side leg-2 high side driveGPIO-03 (55)
PWM-3ASecondary side leg-1 high side driveGPIO-04 (50)
PWM-3BSecondary side leg-1 low side driveGPIO-05 (52)
PWM-4ASecondary side leg-2 high side driveGPIO-06 (54)
PWM-4BSecondary side leg-2 high side driveGPIO-07 (56)
I_DC_PRIPrimary side DC current senseADC-C6 (14)
V_DC_PRIPrimary side voltage senseADC-B11 (24)
I_TANK_PRIPrimary tank current senseADC-B1 (25)
I_TANK_SECSecondary tank current senseADC-A6 (23)
IMON_MCUCurrent monitor of eFuseADC-C9 (15)
ID_AHardware identification pinADC-A0 (9)
CLK_MODClock output for delta sigma modulatorsGPIO8 (57)
CLK_MOD_DELAYEDDelayed clock output for SDFM input to compensate propagation delayGPIO9 (59) (output)
GPIO49 (101) (input)
GPIO51 (105) (input)
GPIO55 (102) (input)
PWM_ENEnable for PWM buffersGPIO12 (58)
FAN_CTLEnable pin for FansGPIO13 (60)
Prof_GPIO1Profiling pin 1GPIO14 (62)
Prof_GPIO2Profiling pin 2GPIO15 (64)
TEMP_SENSEECap input for temperature sensing (not implemented)GPIO20 (68)
MUX_A0Control signal 1 of TMUX1204 for selection of temperature signal (not implemented)GPIO21 (70)
MUX_A1Control signal 2 of TMUX1204 for selection of temperature signal (not implemented)GPIO22(72)
DESAT_PRIDESAT signal from primary side gate driversGPIO10 (61)
DESAT_SECDESAT signal from secondary side gate driversGPIO16 (67)
RST_MCUReset signal from MCU (not used)GPIO11 (63)
RDYPower good indicator form gate driversGPIO17 (69)
FLT_PRIFault signal for primary side current sensorGPIO26 (79)
FLT_SECFault signal for secondary side current sensorGPIO27 (81)
DOUT_V_BATT_SECSDFM input D1GPIO48 (99)
DOUT_V_DC_SECSDFM input D2GPIO50 (101)
DOUT_I_DC_SECSDFM input D4GPIO54 (100)