In Lab 3, the converter is run in secondary voltage close-loop configuration (DAB_vSecSensed_Volts).

This lab runs the voltage mode compensator, obtains the open-loop transfer function of plant from SFRA, and runs the design compensator for the plant in the compensator design tool.

Launch the compensation designer which prompts the selection of a valid SFRA data file. Import the SFRA data from the run in Lab 2 into the compensation designer to design a 2P2Zcompensator. Keep more margins during this iteration of the design to make sure that when the loop is closed, the system is stable. The following coefficient values are hard-coded in the software. The compensation designer GUI gives information about the stability of the loop, gain margin, phase margin, and bandwidth of the loop. The coefficients can be modified in the compensation designer GUI.

#define DAB_GV_2P2Z_A1 ((float32_t) -1.8756666)
#define DAB_GV_2P2Z_A2 ((float32_t) 0.8756666)
#define DAB_GV_2P2Z_B0 (float32_t) 1.4329852)
#define DAB_GV_2P2Z_B1 ((float32_t) -2.7994568)
#define DAB_GV_2P2Z_B2 (float32_t) 1.3664965)

• Test Setup for Lab 3 (Closed Voltage Loop - Sec)

  Compile the project by selecting Lab 3: Closed Loop Voltage with Resistive Load in the drop-down menu of Project Options from PowerSUITE GUI. Make sure current and voltage limits are set per operating conditions.

  #if DAB_LAB == 3
  #define DAB_CONTROL_RUNNING_ON C28X_CORE
  #define DAB_POWER_FLOW DAB_POWER_FLOW_PRIM_SEC
  #define DAB_INCR_BUILD DAB_CLOSED_LOOP_BUILD
  #define DAB_TEST_SETUP DAB_TEST_SETUP_RES_LOAD
  #define DAB_PROTECTION DAB_PROTECTION_ENABLED
  #define DAB_CONTROL_MODE DAB_VOLTAGE_MODE
  #define DAB_SFRA_TYPE 2
  #define DAB_SFRA_AMPLITUDE (float32_t)DAB_SFRA_INJECTION_AMPLITUDE_LEVEL2
  #endif

  Use the following steps to run voltage close loop:

  1. Run the project by clicking the green run button in CCS.
  2. Populate the required variables in the watch window by loading JavaScript setupdebugenv_lab3.js in the scripting console.
     Figure 4-32 Lab 3 - Watch View Configuration
  3. Enable fans and relays by writing "1" into DAB_enableFan and DAB_enableRelay.
  4. Enable PWM by writing “1” to the DAB_clearTrip variable.
  5. In the watch view, check if the DAB_vPrimSensed_Volts, DAB_iPrimSensed_Amps, DAB_vSecSensed_Volts, and DAB_iSecSensed_Amps variables are updating periodically.
  6. Set the output voltage by writing to DAB_vSecRef_Volts (in this example 50Vdc).
  7. Enable closed loop operation by writing “1” to the DAB_closeGvLoop variable. The controller automatically adjusts the phase shift , depending upon the operating conditions to generate secondary output voltage to match with that of DAB_vSecRef_Volts.
     Note: In the software the maximum phase shift is limited to 0.13 as a safety precaution. Adjust the primary voltage to stay within the phase shift limits and still generate the required secondary voltage.
  8. Slowly increase the input VPRIM DC voltage and adjust DAB_vSecRef_Volts accordingly, to reach to the required operating point.
  9. Test the closed-loop operation by varying DAB_vSecRef_Volts from 400 V to 500 V. Observe that the DAB_vSecSensed_Volts tracks this command reference.
     Figure 4-33 Lab 3 - Closed Voltage Loop Expression Window
  10. The control scheme can be changed between single phase shift SPS and extended phase shift EPS, by selecting the according variable in the DAB_pwmSwState.pwmSwState drop down.
      

      Primary side switch node voltage (green), secondary side switch node voltage (red), inductor current (yellow)
      Test condition: V_IN = 800 V, V_OUT = 450 V, I_OUT = 6.5 A

      Figure 4-34 Lab 3 - Waveforms in Single Phase Shift Control (SPS)
      Figure 4-34 shows that secondary side is hard-switching in this condition with SPS control.
      

      Primary side switch node voltage (green), secondary side switch node voltage (red), inductor current (yellow)
      Test condition: V_IN = 800 V, V_OUT = 450 V, I_OUT = 6.5 A

      Figure 4-35 Lab 3 - Waveforms in Extended Phase Shift Control (EPS)

      The additional phase shift on the primary side introduced with EPS control is seen in Figure 4-35. Here both the primary side and the secondary side are soft-switching.

• Frequency response of closed loop voltage
  1. Run the SFRA by clicking on the SFRA icon. The SFRA GUI opens.
  2. Select the options for the device on the SFRA GUI; for example, for F280039, select floating point. Click the Setup Connection button. In the pop-up window, uncheck the boot-on-connect option and select an appropriate COM port. Select the OK button. Return to the SFRA GUI and click the Connect button.
  3. The SFRA GUI connects to the device. An SFRA sweep can now be started by clicking the Start Sweep button. The complete SFRA sweep takes a few minutes to finish. Monitor the activity in the progress bar on the SFRA GUI or by checking the flashing blue LED on the back of the control card, which indicates UART activity.

     The bode plot in Figure 4-36 is captured using a DF22 compensator.

     

     Test condition: V_IN= 800 V, V_OUT = 500 V, I_OUT = 10 A, SFRA amplitude = 0.002

     Figure 4-36 Lab 3 - SFRA Open Loop Plot for the Closed Voltage Loop