TIDUF17 November   2022 TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 TMS320F280039C
      2. 2.3.2 UCC21530-Q1
      3. 2.3.3 OPA607-Q1
      4. 2.3.4 LM25184-Q1
      5. 2.3.5 TCAN1044A-Q1
    4. 2.4 System Design Theory
      1. 2.4.1 Three-Phase PMSM Drive
      2. 2.4.2 Field Oriented Control of PM Synchronous Motor
      3. 2.4.3 Field Weakening (FW) and Maximum Torque Per Ampere (MTPA) Control
      4. 2.4.4 Compressor Drive with Automatic Vibration Compensation
      5. 2.4.5 Hardware Prerequisites for Motor Drive
        1. 2.4.5.1 Motor Current Feedback
          1. 2.4.5.1.1 Current Sensing with Three-Shunt
          2. 2.4.5.1.2 Current Sensing with Single-Shunt
        2. 2.4.5.2 Motor Voltage Feedback
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 Hardware Board Overview
      2. 3.1.2 Test Conditions
      3. 3.1.3 Test Equipment Required for Board Validation
    2. 3.2 Test Setup
      1. 3.2.1 Hardware Setup
      2. 3.2.2 Software Setup
        1. 3.2.2.1 Code Composer Studio Project
        2. 3.2.2.2 Software Structure
    3. 3.3 Test Procedure
      1. 3.3.1 Level 1 Incremental Build
        1. 3.3.1.1 Project Setup
        2. 3.3.1.2 Running the Application
      2. 3.3.2 Level 2 Incremental Build
        1. 3.3.2.1 Project Setup
        2. 3.3.2.2 Running the Application
      3. 3.3.3 Level 3 Incremental Build
        1. 3.3.3.1 Project Setup
        2. 3.3.3.2 Running the Application
      4. 3.3.4 Level 4 Incremental Build
        1. 3.3.4.1 Project Setup
        2. 3.3.4.2 Running the Application
        3. 3.3.4.3 Tuning Field Weakening and MTPA Control
        4. 3.3.4.4 Tuning Vibration Compensation
        5. 3.3.4.5 CAN FD Command Interface
    4. 3.4 Test Results
      1. 3.4.1 MCU CPU Load, Memory, and Peripheral Usage
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks

MCU CPU Load, Memory, and Peripheral Usage

Table 3-2 shows the CPU cycles used and the CPU loading when running the reference project on the F280039C with a 120 MHz CPU clock. These numbers are based on build level 4 and use the project's default settings regarding which functions are run from RAM (such as the main ISR) and which functions are run from Flash.

Table 3-2 CPU Loading
CPU=120MHzMaximum CPU Cycles For ISRMaximum CPU Utilization [%]Maximum MIPS Used [MIPS]
CPU Utilization

(15-kHz ISR)

207925.9931.185

Table 3-3 shows how much memory is needed to run the application on the microcontroller. This memory footprint is based on the default project settings. Adding additional features (such as MTPA or vibration compenstation) or removing features (such as switching from fast_full_lib.lib to fast_simple_lib.lib to remove motor identification) results in some change to the memory footprint. As shown, a significant part of the memory is still available for performing other tasks.

Table 3-3 Memory Usage
TypeUsed Memory on F280039CAvailable Memory on F280039CF280039C Memory Utilization
FLASH41.7 KB384 KB10.9%
RAM15.3 KB69 KB22.2%

Table 3-4 lists the peripherals used by this reference design.

Table 3-4 F28003x Peripheral Usage
Module Purpose
ADCA, ADCB, ADCC Three-phase PWM (total of 6 PWM channels)
EPWM1, EPWM2, EPWM3 Motor current and voltage sensing (total of 7 ADC channels)
CMPSS1, CMPSS2, CMPSS3 Three-phase overcurrent fault protection
EPWMXBAR TRIP7 CMPSS output to the EPWM trip for overcurrent protection
MCANA Communication
CPU Timer 0 Virtual timer for motor and system control in background loop
GPIOs One for controlCARD LED D2, One for DISABLE_FET_SUPPLY signal