TIDUF65 March   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Consideration
    3. 2.3 Highlighted Products
      1. 2.3.1 TMCS1123
      2. 2.3.2 ADS7043
      3. 2.3.3 AMC1035
      4. 2.3.4 REF2033
  9. 3System Design Theory
    1. 3.1 Hall-Effect Current Sensor Schematic Design
    2. 3.2 Analog-to-Digital Converter
      1. 3.2.1 Delta-Sigma Modulator
        1. 3.2.1.1 Common-Mode Voltage Limit
        2. 3.2.1.2 Input Filter
        3. 3.2.1.3 Interface to MCU
      2. 3.2.2 12-bit SAR ADC
        1. 3.2.2.1 Common-Mode Voltage Limit
        2. 3.2.2.2 Input Filter
        3. 3.2.2.3 Interface to MCU
    3. 3.3 Power Supply and Reference Voltage
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
      1. 4.3.1 Precautions
    4. 4.4 Test Results
      1. 4.4.1 DC Performance
        1. 4.4.1.1 Output Voltage Noise and ENOB After A/D Conversion
        2. 4.4.1.2 Linearity and Temperature Drift
      2. 4.4.2 AC Performance
        1. 4.4.2.1 SNR Measurement
        2. 4.4.2.2 Latency Test
      3. 4.4.3 PWM Rejection
      4. 4.4.4 Overcurrent Response
      5. 4.4.5 Adjacent Current Rejection
      6. 4.4.6 Power Supply Rejection Ratio
      7. 4.4.7 Digital Interface
  11. 5Performance Comparison with Competitor’s Device
    1. 5.1 Effective Number of Bits
    2. 5.2 Latency
    3. 5.3 PWM Rejection
  12. 6Design and Documentation Support
    1. 6.1 Design Files
      1. 6.1.1 Schematics
      2. 6.1.2 BOM
      3. 6.1.3 PCB Layout Recommendations
        1. 6.1.3.1 Layout Prints
    2. 6.2 Tools and Software
    3. 6.3 Documentation Support
    4. 6.4 Support Resources
    5. 6.5 Trademarks
  13. 7About the Author

Latency

For the latency test details, see Section 4.4.2.2. Inject a 10kHz, 3A peak square wave current into TIDA-010937 and measure the latency between 50% input and 50% output. The test results are shown in Figure 5-1 and Figure 5-2

GUID-20240201-SS0I-VM1B-X4KC-ZDH32KBLDVFS-low.pngFigure 5-1 Latency Test (TMCS1123B3)
GUID-20240201-SS0I-KSPG-60CN-8QC3PVFPLCJG-low.pngFigure 5-2 Latency Test (Competitor’s Device)

Figure 5-1 shows TMCS1123 has a significant advantage on latency. The latency as low as 300ns provides the higher frequency current sensing and does not influence the system control bandwidth. For the competitor’s device, the latency consists of two parts: one is up to 550ns propagation delay, the other is zero to 50% latency which is around 2.1μs.

Also, the persistence mode of the scope shows that there is large ringing during the rising edge of the input current on competitor’s device, while the output voltage of the TMCS1123 is smoother and is designed for high di/dt applications.