TIDUF82A August   2024  – November 2024 DRV8162 , INA241A , ISOM8710

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Reference Design Overview
    2. 1.2 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Hardware Design
        1. 2.2.1.1 Power Stage Gate Driver
          1. 2.2.1.1.1 Gate Driver
          2. 2.2.1.1.2 Protection Features
          3. 2.2.1.1.3 VGVDD Definition
          4. 2.2.1.1.4 Strap Functions
        2. 2.2.1.2 Power Stage FETs
          1. 2.2.1.2.1 VGS versus RDS(ON)
        3. 2.2.1.3 Phase Current and Voltage Sensing
          1. 2.2.1.3.1 Phase Current
          2. 2.2.1.3.2 Phase Current – Bias Voltage Reference
          3. 2.2.1.3.3 Voltage
        4. 2.2.1.4 Host Processor Interface
        5. 2.2.1.5 Gate Drive Shutdown Path
        6. 2.2.1.6 System Diagnostic Measurements
          1. 2.2.1.6.1 Temperature Measurement
        7. 2.2.1.7 System Power Supply
          1. 2.2.1.7.1 12V Rail
          2. 2.2.1.7.2 3.3V Rail
      2. 2.2.2 Software Design
    3. 2.3 Highlighted Products
      1. 2.3.1 DRV8162L
      2. 2.3.2 INA241A
      3. 2.3.3 LMR38010
      4. 2.3.4 TMP6131
      5. 2.3.5 ISOM8710
  9. 3Hardware, Software Test Requirements and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 PCB Overview
      2. 3.1.2 Hardware Configuration
        1. 3.1.2.1 Prerequisites
        2. 3.1.2.2 Default Resistor and Jumper Configuration
        3. 3.1.2.3 Connector
          1. 3.1.2.3.1 Host Processor Interface
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Power Management
        1. 3.3.1.1 Power Up
        2. 3.3.1.2 Power Down
      2. 3.3.2 Gate Voltage and Phase Voltage
        1. 3.3.2.1 20 VDC
        2. 3.3.2.2 48 VDC
        3. 3.3.2.3 60 VDC
      3. 3.3.3 Digital PWM and Gate Voltage
      4. 3.3.4 Phase-Current Measurements
      5. 3.3.5 System Test Results
        1. 3.3.5.1 Thermal Analysis
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Authors
  12. 6Revision History

1 System Description

Many low-voltage, three-phase inverters for DC-fed motor drives are powered by a 24V DC to 60V DC rail. When looking at robotics systems, the motors often have different power ratings, typically at 200W, 400W, 750W, 1.5kW, and 2.5kW, or even higher occasionally, depending on the functions to implement. These motors have different requirements on the current rating of the motor drives.

This design supports motors from 1.5kW to 4kW. For a 48V DC input motor drive system, the rated output current can be about 32Arms to 85Arms; and in some occasions even reach up to around 100Arms.

In designing these power stages, high efficiency is a key point of the targets. With high efficiency, a small PCB size can be achieved, and the driver is able to fit into the shell of an integrated motor drive system, where the power stage can only use the motor shell as the heat sink for thermal dissipation.

To achieve a small PCB size in this design, the smart gate driver DRV8162L helps a lot with the integrated protection functions against the power stage shoot-through, overcurrent and short circuit. These important features were realized in the past using external circuity which adds to the PCB size.

To optimize system efficiency and EMI performance, without adding any external circuitry, the smart DRV8162L gate driver adds the ability to program the output source and sink current. A VGS handshake with dead time insertion can be enabled to prevent shoot-through from happening.

To enable the drive to control the motor at the highest efficiency, an in-phase shunt-based current sensing is adopted using the INA241A, a high common-mode rejection, zero-drift featured current sense amplifier. Due to the high gain of the amplifier, a 0.2mΩ shunt is used; and the low resistance shunt selection also contributes to the high efficiency of the system.

Designing the system to be able to stop the motor safely and prevent any unexpected start-ups are critical requirements for robotics and factory automation applications. To assist these system level requirements and achieve the so-called Safe Torque Off (STO) function, this reference design proposes various combinations of shutdown paths for the gate drivers to prevent the motor from unexpected power up.