SLLU166A June 2012 – September 2022 ISO1540 , ISO1540-Q1 , ISO1541 , ISO1541-Q1
This User’s Guide details the ISO154x Evaluation Module (EVM) operation of the factory-installed ISO1540 and ISO1541 I2C-compatible bidirectional isolators. The EVM may be reconfigured for use with two ISO1540 or two ISO1541 instead of one of each.
This Guide presents a typical laboratory setup used with this EVM.
This Evaluation Module (EVM) is made available for isolator parameter performance evaluation only and is not intended for isolation voltage testing. To prevent damage to the EVM, any voltage applied as a supply or digital input/output must be maintained within the 0 V to 5.5 V recommended operating range.
Exceeding the specified input voltage range may cause unexpected operation and irreversible damage to the EVM. If there are questions concerning the input voltage range, contact a TI field representative prior to connecting power.
Applying loads outside the specified output range may result in unintended operation and possible permanent damage to the EVM. If there is uncertainty as to the load specification, contact a TI field representative.
The ISO154x devices are low-power, bidirectional isolators that are compatible with I2C interfaces. The logic input and output buffers on these devices are separated by TI’s Isolation technology utilizing a silicon dioxide (SiO2) barrier. When used in conjunction with isolated power supplies, these devices block high voltages, isolate grounds and prevent noise currents from entering the local ground and interfering with or damaging sensitive circuitry.
The ISO1540 has two isolated bidirectional channels for clock and data lines and is fit for multi-master applications. The ISO1541 has a bidirectional data and a unidirectional clock channel and is useful in applications that have a single master.
These devices achieve isolated bidirectional communication by introducing an offset, making the side 1 low-level output greater than the side 1 low-level input and thus preventing an internal logic latch that otherwise would occur with standard digital isolators.