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TPS563202 is the next generation part of TPS563201. TPS563202 uses small SOT563 package which is 1.6mmx1.6mm and uses HotRod package technology. It has good thermal performance and stability. Table 1-1 includes the SOT563 package parts. These parts can be widely used in TV, STB, Routers, switches, AP, and so on.
PN | Max loading | Mode | Frequency | Vref voltage | Vref accuracy At room temp |
---|---|---|---|---|---|
TPS563202 | 3A | ECO | 580k | 0.8 | 2% |
TPS563207 | 3A | FCCM | 580k | 0.8 | 2% |
TPS562202 | 2A | ECO | 580k | 0.8 | 2% |
TPS562207 | 2A | FCCM | 580k | 0.8 | 2% |
TPS563231 | 3A | ECO | 600k | 0.6 | 2% |
TPS562231 | 2A | ECO | 850k | 0.6 | 2% |
TPS563202S | 3A | ECO | 580k | 0.8 | 1.5% |
TPS563207S | 3A | FCCM | 580k | 0.8 | 1.5% |
TPS562202S | 2A | ECO | 580k | 0.8 | 1.5% |
TPS562207S | 2A | FCCM | 580k | 0.8 | 1.5% |
Application note SLVA546 gives DCAP2 topology block diagram and system function. TPS563202 employ DCAP2 topology, so it can use the way in SLVA546 to assess loop stability. DCAP2 topology block diagram as shown in Figure 2-1 and open transfer function shown in Equation 1 and Equation 2.
In Equation 1, Gdv(s) is the transfer function from Duty to Vout, HFB(s) is the transfer function of the feedback divider network from Vout to VFB, HCOMP(s) is the transfer function from VFB to Duty, Hd(s) is the delay due to fixed on time.
Equation 1 introduces TPS563202 system function. The bode-plot is shown in Figure 2-2 from SLVA546. From the system function and bode-plot, there is a double pole which is decided by inductance and output capacitance. There is a zero which is decided by internal ripple injection circuit. In TPS563202 this zero is constant which is 24kHz. From system function, there is also an ESR zero which is decided by ESR of output capacitance and output capacitance. Normally this zero frequency is put largely after than crossover frequency. So this zero does not have an effect on bandwidth and phase margin. Figure 2-2 does not show this zero. The DC gain is made by Acp, Vref and output voltage as Equation 2.
To calculate the value of the inductor, LIR is used. LIR is a coefficient that represents the amount of inductor ripple current relative to the maximum output current. In every cycle, inductor current is LIR times of max output current from Equation 3. The inductor ripple current is filtered by the output capacitor. Therefore, choosing high inductor ripple currents impact the selection of the output capacitor since the output capacitor must have a ripple current rating equal to or greater than the inductor ripple current. A good rule is that LIR is normally from 0.2 to 0.5 for the majority of applications. So inductor can be received with Equation 4 based on this rule.
Sometimes the real maximum loading is less than 3A, such as like 1A. In this condition, it still uses maximum loading of the used part to calculate inductance. TPS563202 is a 3A part. It’s stable at 3A, of course it’s also stable with any below 3A loading, similar to 1A. And it doesn’t need to worry about output voltage ripple. Even though the inductor peak to peak current is larger compared with real 1A loading, output voltage ripple is still very small.
Here is uses an example of 12 V input voltage to 5 V output voltage based on TPS563202. Maximum loading of TPS563202 is 3A. The real loading is only 1A in one application. Based on Equation 4, LIR is set to 0.35. So inductor should be set to 4.7uH. If so, inductor peak to peak current is about 1.05A which is even larger than real 1A loading. But it’s no any problems in real application. Figure 2-3 is waveform at 1A loading, Figure 2-4 is waveform at 3A loading. From waveforms, inductor peak to peak current does be 1A, but output voltage ripple is less than 50mV at both 1A and 3A loading.
In second chapter, it introduces system and bode plot of DCAP2 topology. It’s suggested to put double pole frequency marginally smaller than internal zero frequency. The internal zero can boost phase higher. So the system can get a larger bandwidth and a higher phase margin at crossover frequency. The internal zero frequency of TPS563202 is 24kHz, So it’s good to put double pole frequency to about 20kHz as Equation 5. Output capacitance Cout is received from Equation 6.
MLCC capacitance is widely used in application because of its small size, low ESR and good price. But degrading of MLCC capacitance is very large when adding a DC bias voltage, especially at higher DC bias voltage. The degrading couldn’t be ignored in calculating output capacitance. It introduces an example of MuRata capacitance GRM21BR61A226ME44 which is 10V, 22uF, and 0805 footprint. Figure 2-5 is degrading curve. From the figure, the capacitance degrades by 50% at 5V bias voltage. If the MLCC capacitance rated voltage is smaller, or footprint is smaller, it degrades much larger. In the calculation of output capacitance, the degrading of MLCC capacitance could not be ignored.