SPRUJ59A April 2024 – September 2024 TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SJ-Q1
This migration guide describes the hardware and software differences to be aware of when moving between F28003x and F28P55x C2000™ real-time MCUs. This document shows the block diagram between the two MCUs as a visual representation on what blocks are similar or different. It also highlights the features that are unique between the two devices for all available packages in a device comparison table. The F28003x and F28P55x devices have three packages in common; 100-pin, 80-pin and 64-pin so a PCB hardware section has been added to aid in migration between the three common packages. The digital general-purpose input/output (GPIO) and analog multiplex comparison tables show pin functionality between the two MCUs. This is a good reference for hardware design and signal routing when considering a move between the two devices. Lastly, like the F28003x device, the F28P55x software support is only in EABI format.
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F28P55x is a superset of F28003x. They have three packages in common, 64-pin, 80-pin and 100-pin. It is possible to migrate between F28003x and F28P55x with the caveats in this document taken into account.
An overlaid block diagram of F28003x and F28P55x is shown in F28003x and F28P55x Overlaid Functional Block Diagram while feature comparison of the superset part numbers for the F28003x and F28P55x devices is shown in Table 1-1.
Feature | F28003x | F28P55x | |
---|---|---|---|
CPU Frequency (MHz) | 120 | 150 | |
Fast Integer Division (FINTDIV) | Yes | No | |
Memory | |||
Flash | 384KB | 1088KB | |
RAM | Local Shared | 32KB | 64KB |
Global Shared | 32KB | 64KB | |
System | |||
Configurable Logic Block(CLB) | 4 Tiles | 2 Tiles | |
Motor Control Libraries in ROM | Yes | No | |
Background CRC(BGCRC) | Yes | No | |
HWBIST | Yes | No | |
Neural-Network Processing Unit (NNPU) | No | 1 - Type 0 | |
Analog Peripherals | |||
ADC 12-bit | Number of ADCs | 3 - Type 5 | 5 - Type 6 |
MSPS | 4 | 4 | |
Conversion Time (ns) | 250 | 255 | |
CMPSS | 4 - Type 2 | 4 - Type 6 | |
Buffered DAC - Type 2 | 2 | 1 | |
Programmable Gain Amplifier (PGA) | - | 3 - Type 2 | |
Output DAC from CMPSS DACL | 0 | 1 | |
Control Peripherals | |||
eCAP/HRCAP Modules | 3(1 with HRCAP capability) - Type 2 | 2 - Type 2 | |
ePWM/HRPWM channels - Type 4 | 16 (8 with HRPWM) | 24 (16 with HRPWM) | |
eQEP - Type2 | 2 | 3 | |
Communication Periperhals | |||
SDFM | 8 - Type 2 | - | |
CAN (DCAN) - Type 0 | 1 | - | |
CANFD (MCAN) - Type 1 | 1 | 2 | |
I2C | 2 - Type 1 | 2 - Type 2 | |
LIN - Type 1 | 2 | 1 | |
HIC | 1 - Type 1 | - | |
PMBUS | 1 - Type 1 | 1 - Type 2 | |
SCI - Type 0 | 2 | 3 | |
USB | - | 1 - Type 0 |
IO Type | F28003x | F28P55x |
---|---|---|
Digital | ||
AIO (analog with digital inputs) | 23 | 16 |
AGPIO (analog with digital inputs and outputs) | 2 | 19 |
Additional GPIO | 4 (2 from cJTAG and 2 from X1/X2) | 4 (2 from cJTAG and 2 from X1/X2) |
Standard GPIO | 49 | 43 |
Total GPIO | 55 | 66 |
Total GPIO + AIO | 78 | 82 |
Analog | ||
ADC Channels (single-ended) | 23 | 35 |
IO Type | F28003x | F28P55x |
---|---|---|
Digital | ||
AIO (analog with digital inputs) | 16 | 12 |
AGPIO (analog with digital inputs and outputs) | 2 | 16 |
Additional GPIO | 4 (2 from cJTAG and 2 from X1/X2) | 4 (2 from cJTAG and 2 from X1/X2) |
Standard GPIO | 37 | 32 |
Total GPIO | 43 | 52 |
Total GPIO + AIO | 59 | 64 |
Analog | ||
ADC Channels (single-ended) | 18 | 28 |
IO Type | F28003x | F28P55x |
---|---|---|
Digital | ||
AIO (analog with digital inputs) | 16 | 12 |
AGPIO (analog with digital inputs and outputs) | 2 | 13 |
Additional GPIO | 4 (2 from cJTAG and 2 from X1/X2) | 4 (2 from cJTAG and 2 from X1/X2) |
Standard GPIO | 24 | 17 |
Total GPIO | 30 | 37 |
Total GPIO + AIO | 46 | 49 |
Analog | ||
ADC Channels (single-ended) | 16 | 28 |