SPRZ572A April 2024 – September 2024 TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SJ-Q1
This document describes the known exceptions to the functional specifications (advisories). This document may also contain usage notes. Usage notes describe situations where the device's behavior may not match presumed or documented behavior. This may include behaviors that affect device performance or functional correctness.
NUMBER | TITLE | SILICON REVISIONS AFFECTED | |
---|---|---|---|
0 | A | ||
Section 3.1.1 | PIE: Spurious Nested Interrupt After Back-to-Back PIEACK Write and Manual CPU Interrupt Mask Clear | Yes | Yes |
Section 3.1.2 | Caution While Using Nested Interrupts | Yes | Yes |
Section 3.1.3 | Security: The primary layer of defense is securing the boundary of the chip, which begins with enabling JTAGLOCK and Zero-pin Boot to Flash feature | Yes | Yes |