SNVS056J May   2000  – June 2015 LP3961 , LP3964

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configurations and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Short-Circuit Protection
      2. 7.3.2 ERROR Flag Operation
      3. 7.3.3 SENSE Pin
      4. 7.3.4 Dropout Voltage
      5. 7.3.5 Reverse Current Path
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VOUT(TARGET) + 0.35 V ≤ VIN ≤ 7 V
      2. 7.4.2 Operation With Shutdown (SD) Pin Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
          1. 8.2.2.1.1 Input Capacitor
          2. 8.2.2.1.2 Output Capacitor
        2. 8.2.2.2 Selecting a Capacitor
        3. 8.2.2.3 Capacitor Characteristics
          1. 8.2.2.3.1 Ceramic
          2. 8.2.2.3.2 Tantalum
          3. 8.2.2.3.3 Aluminum
        4. 8.2.2.4 RFI and EMI Susceptibility
        5. 8.2.2.5 Output Adjustment
        6. 8.2.2.6 Turnon Characteristics for Output Voltages Programmed to 2.0 V or Below
        7. 8.2.2.7 Output Noise
        8. 8.2.2.8 Shutdown Operation
        9. 8.2.2.9 Maximum Output Current Capability
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Heatsinking TO-220 Packages
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Input Supply Voltage: 2.5 V to 7 V
  • Ultra-Low Dropout Voltage
  • Low Ground Pin Current
  • Load Regulation of 0.02%
  • 15-µA Quiescent Current in Shutdown Mode
  • Specified Output Current of 0.8-A DC
  • Output Voltage Accuracy ±1.5%
  • ERROR Flag Indicates Output Status (LP3961)
  • Sense Option Improves Better Load Regulation (LP3964)
  • Extremely Low Output Capacitor Requirements
  • Overtemperature and Overcurrent Protection
  • −40°C to 125°C Junction Temperature Range

2 Applications

  • Microprocessor Power Supplies
  • GTL, GTL+, BTL, and SSTL Bus Terminators
  • Power Supplies for DSPs
  • SCSI Terminator
  • Post Regulators
  • High-Efficiency Linear Regulators
  • Battery Chargers
  • Other Battery-Powered Applications

3 Description

The LP396x series of fast ultra-low-dropout linear regulators operate from a 2.5-V to 7-V input supply. A wide range of preset output voltage options are available. These ultra-low dropout linear regulators respond very fast to step changes in load which makes them suitable for low-voltage microprocessor applications. The LP3961 and LP3964 are developed on a CMOS process which allows low quiescent current operation independent of output load current, as well as operation under extremely low dropout conditions.

Dropout Voltage: Ultra-low dropout voltage; typically 24 mV at 80-mA load current and 240 mV at 800-mA load current.

Ground Pin Current: Typically 4 mA at 800-mA load current.

ERROR Flag:ERROR flag goes low when the output voltage drops 10% below nominal value (for LP3961).

SENSE: SENSE pin improves regulation at remote loads (for LP3964).

Precision Output Voltage: Multiple output voltage options are available ranging from 1.2 V to 5 V and adjustable (LP3964), with a specified accuracy of ±1.5% at room temperature, and ±3% over all conditions (varying line, load, and temperature).

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
LP3961
LP3964		 SOT-223 (5) 6.50 mm × 3.56 mm
TO-263 (5) 10.16 mm × 8.42 mm
LP3964 TO-220 (5) 14.986 mm × 10.16 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

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LP3964 Typical Application Circuits

LP3961 LP3964 10112902.png

LP3961 Typical Application Circuit

LP3961 LP3964 10112901.png
A. *SD and ERROR pins must be pulled high through a 10-kΩ pullup resistor. Connect the ERROR pin to ground if this function is not used.