The ONET1130EC is a 2.5 V integrated modulator driver and limiting amplifier with transmit and receive clock and data recovery (CDR) designed to operate between 9.80 Gbps and 11.7 Gbps without the need for a reference clock. Optical and electrical loopback are included. CDR bypass mode can be used for operation at lower data rates and a two-wire serial interface allows digital control of the features.
The transmit path consists of an adjustable input equalizer for equalization of up to 300 mm
(12 inches) of microstrip or stripline transmission line of FR4 printed circuit boards, a multi-rate CDR and an output modulator driver. Output waveform control, in the form of cross-point adjustment and de-emphasis are available to improve the optical eye mask margin. Bias current for the laser is provided and an integrated automatic power control (APC) loop to compensate for variations in average optical power over voltage, temperature and time is included.
The receive path consists of a limiting amplifier with programmable equalization and threshold adjustment, a multi-rate CDR and output de-emphasis to compensate for frequency dependent loss of connectors, microstrips or striplines connected to the output of the device, The receiver output amplitude and loss of signal assert level can be adjusted.
ORDER NUMBER | PACKAGE (PIN) | BODY SIZE |
---|---|---|
ONET1130EC | VQFN (32) | 4.00 mm x 4.00 mm |
Changes from * Revision (June 2015) to A Revision
The ONET1130EC contains internal analog to digital and digital to analog converters to support transceiver management and eliminate the need for special purpose microcontrollers.
The transceiver is characterized for operation from –40°C to 100°C case temperatures and is available in a small footprint 4mm × 4mm, 32 pin RoHS compliant VQFN package.
NUMBER | NAME | Type | DESCRIPTION |
---|---|---|---|
AMP | 16 | Analog-in | Output amplitude control. Output amplitude can be adjusted by applying a voltage of 0 to 2 V to this pin. Leave open when not used. |
BIAS | 10 | Analog | Sinks or sources the bias current for the laser in both APC and open loop modes. |
COMP | 23 | Analog | Compensation pin used to control the bandwidth of the APC loop. Connect a 0.01-µF capacitor to ground. |
GND | 3, 6, 19, 22 | Supply | Circuit ground. |
LOL | 1 | Digital-out | Transmitter and receiver loss of lock indicator. High level indicates the transmitter or the receiver is out of lock. Open drain output. Requires an external 4.7 kΩ to 10 kΩ pull-up resistor to VCC for proper operation. This pin is 3.3 V tolerant. |
MONB | 2 | Analog-out | Bias current monitor. |
MONP | 8 | Analog-out | Photodiode current monitor. |
PD | 7 | Analog | Photodiode input. Pin can source or sink current dependent on register setting. |
RX_DIS | 26 | Digital-in | Disables the receiver output buffer when set to a high level. Includes a 250-kΩ pull-up resistor to VCC. Ground the pin to enable the output. This is an ORed function with the RXOUT_DIS bit (bit 6 in register 4). This pin is 3.3-V tolerant. |
RX_LF | 25 | Analog-in | Receiver loop filter capacitor. |
RX_LOS | 24 | Digital-out | Receiver loss of signal. High level indicates that the receiver input signal amplitude is below the programmed threshold level. Open drain output. Requires an external 4.7-kΩ to 10-kΩ pull-up resistor to VCC for proper operation. This pin is 3.3-V tolerant. |
RXIN+ | 20 | Analog-in | Non-inverted receiver data input. On-chip differentially 100 Ω terminated to RXIN–. Must be AC coupled. |
RXIN- | 21 | Analog-in | Inverted receiver data input. On-chip differentially 100 Ω terminated to RXIN+. Must be AC coupled. |
RXOUT– | 28 | CML-out | Inverted receiver data output. 45 Ω back-terminated to VCC. |
RXOUT+ | 29 | CML-out | Non-inverted data output. 45 Ω back-terminated to VCC. |
SDA | 17 | Digital-in/out | 2-wire interface serial data input. Requires an external 4.7-kΩ to10-kΩ pull-up resistor to VCC. This pin is 3.3-V tolerant. |
SCK | 18 | Digital-in | 2-wire interface serial clock input. Requires an external 4.7-kΩ to10-kΩ pull-up resistor to VCC. This pin is 3.3-V tolerant. |
TX_DIS | 32 | Digital-in | Disables both bias and modulation currents when set to high state. Includes a 250-kΩ pull-up resistor to VCC. Requires an external 4.7 kΩ to 10 kΩ pull-up resistor to VCC for proper operation Toggle to reset a fault condition. This is an ORed function with the TXBIASEN bit (bit 2 in register 1). This pin is 3.3-V tolerant. |
TXIN+ | 4 | Analog-in | Non-inverted transmitter data input. On-chip differentially 100 Ω terminated to TXIN–. Must be AC coupled. |
TXIN– | 5 | Analog-in | Inverted transmitter data input. On-chip differentially 100 Ω terminated to TXIN+. Must be AC coupled. |
TX_LF | 9 | Analog-in | Transmitter loop filter capacitor. |
TX_FLT | 31 | Digital-out | Transmitter fault detection flag. High level indicates that a fault has occurred. Open drain output. Requires an external 4.7 kΩ to 10 kΩ pull-up resistor to VCC for proper operation. This pin is 3.3-V tolerant. |
TXOUT– | 12 | CML-out | Inverted transmitter data output. Internally terminated in single-ended operation mode. |
TXOUT+ | 13 | CML-out | Non-Inverted transmitter data output. |
VCC_RX | 27, 30 | Supply | 2.5 V ± 5% supply for the receiver. |
VCC_TX | 11, 14 | Supply | 2.5 V ± 5% supply for the transmitter. |
VDD | 15 | Supply | 2.5 V ± 5% supply for the digital circuitry. |
Exposed Pad | EP | Exposed die pad. Solder to the PCB. |