Refer to the PDF data sheet for device specific package drawings
The TLV742P series of low-dropout linear voltage regulators (LDOs) are optimized to providing excellent performance by supporting a wide output voltage range. The LDOs can directly regulate a single cell Li-ion battery input-to-output voltage as low as 0.85 V. If used to post-regulate a DC-DC converter output, the high PSRR of 55 dB at 1 MHz suppresses ripple to provide a stable low-noise, well-regulated VOUT.
The TLV742P has an active output discharge feature that helps ensure the output is kept low while the system is disabled, in standby mode, or in sleep mode. Additionally, overcurrent protection is present to protect the device in the event of an output short along with thermal shutdown to prevent overheating.
The TLV742P series of voltage regulators are available in a 1 mm × 1 mm X2SON package to minimize PCB area.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TLV742P | X2SON (4) | 1.00 mm × 1.00 mm |
DATE | REVISION | NOTES |
---|---|---|
September 2017 | * | Initial release. |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
EN | 3 | I | Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown mode. For TLV742P, output voltage is discharged through an internal 120-Ω resistor when device is shut down. |
GND | 2 | — | Ground pin |
IN | 4 | I | Input pin. For good transient performance, place a small 1-µF ceramic capacitor from this pin to ground. See Input and Output Capacitor Requirements for more details. |
OUT | 1 | O | Regulated output voltage pin. A small 1-μF ceramic capacitor is required from this pin to ground to ensure stability. See Input and Output Capacitor Requirements for more details. |
Thermal pad | — | — | The thermal pad is electrically connected to the GND node. Connect to the GND plane for improved thermal performance. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage(2) | IN | –0.3 | 6 | V |
EN | –0.3 | 6 | V | |
OUT | –0.3 | 6 | V | |
Current (source) | OUT | Internally limited | ||
Output short-circuit duration | Indefinite | |||
Operating junction, TJ | –55 | 150 | °C | |
Storage, Tstg | –55 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM) QSS 009-105 (JESD22-A114A)(1) | ±2000 | V |
Charged device model (CDM) QSS 009-147 (JESD22-C101B.01)(2) | ±500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VIN | Input voltage | 2 | 5.5 | V | |
IOUT | Output current | 0 | 200 | mA | |
TJ | Operating junction temperature range | –40 | 125 | °C |
THERMAL METRIC(1) | TLV742P | UNIT | |
---|---|---|---|
DQN (X2SON) | |||
4 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 180.4 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 152 | °C/W |
RθJB | Junction-to-board thermal resistance | 117.2 | °C/W |
ψJT | Junction-to-top characterization parameter | 5.1 | °C/W |
ψJB | Junction-to-board characterization parameter | 117 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 99.7 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||||
---|---|---|---|---|---|---|---|---|---|
VIN | Input voltage range | 2 | 5.5 | V | |||||
VOUT | Output voltage range | 0.85 | 5 | V | |||||
DC output accuracy | 0.5% | ||||||||
VOUT ≥ 0.85 V | –1.5% | 1.5% | |||||||
ΔVO(ΔVI) | Line regulation | 1 | 5 | mV | |||||
ΔVO(ΔIO) | Load regulation | 0 mA ≤ IOUT ≤ 150 mA | 10 | 20 | mV | ||||
V(DO) | Dropout voltage | VIN = 0.98 × VOUT(NOM) | 2 V < VOUT ≤ 2.4 V | IOUT = 30 mA | 65 | mV | |||
IOUT = 150 mA | 325 | 360 | mV | ||||||
2.4 V < VOUT ≤ 2.8 V | IOUT = 30 mA | 50 | mV | ||||||
IOUT = 150 mA | 250 | 300 | mV | ||||||
2.8 V < VOUT ≤ 3.3 V | IOUT = 30 mA | 45 | mV | ||||||
IOUT = 150 mA | 220 | 270 | mV | ||||||
3.3 V < VOUT ≤ 5 V | IOUT = 30 mA | 40 | mV | ||||||
IOUT = 150 mA | 200 | 250 | mV | ||||||
ICL | Output current limit | VOUT = 0.9 × VOUT(NOM) | 240 | 300 | 450 | mA | |||
I(GND) | Ground pin current | IOUT = 0 mA | 25 | 50 | µA | ||||
I(EN) | EN pin current | VEN = 5.5 V | 0.01 | µA | |||||
ISHUTDOWN | Shutdown current | VEN ≤ 0.4 V 2 V ≤ VIN ≤ 4.5 V |
1 | µA | |||||
VIL(EN) | EN pin low-level input voltage (disable device) |
0 | 0.4 | V | |||||
VIH(EN) | EN pin high-level input voltage (enable device) | 0.9 | VIN | V | |||||
PSRR | Power-supply rejection ratio | VIN = 3.3 V VOUT = 2.8 V IOUT = 30 mA |
f = 100 Hz | 70 | dB | ||||
f = 10 kHz | 55 | ||||||||
f = 1 MHz | 55 | ||||||||
Vn | Output noise voltage | BW = 100 Hz to 100 kHz, VIN = 2.3 V VOUT = 1.8 V IOUT = 10 mA |
45 | µVRMS | |||||
tSTR | Startup time(1) | COUT = 1 µF IOUT = 150 mA |
100 | µs | |||||
RPULLDOWN | Pulldown resistance (TLV742P only) |
120 | Ω | ||||||
TJ | Operating junction temperature | –40 | 125 | °C |
VOUT = 1.2 V |
VOUT = 1.2 V, IOUT = 10 mA |
VOUT = 1.2 V, IOUT = 150 mA |
VOUT = 1.2 V |
IOUT = 150 mA |
VOUT = 2.8 V |
VOUT = 2.8 V, IOUT = 0 mA |
VOUT = 2.8 V, IOUT = 0 mA |
VOUT = 2.8 V |
VOUT = 2.8 V |
VOUT = 2.8 V |
VOUT = 2.8 V |
VOUT = 2.8 V, IOUT = 150 mA |
VOUT = 3.3 V, IOUT = 150 mA |
VOUT = 1.2 V | ||
VOUT = 2.8 V |
VOUT = 1.2 V, IOUT = 150 mA |
VOUT = 1.2 V, IOUT = 150 mA |
VOUT = 2.8 V, IOUT = 150 mA |
VOUT = 2.8 V, IOUT = 200 mA |
VOUT = 1.2 V, IOUT = 30 mA |
VOUT = 2.8 V |
VOUT = 2.8 V, IOUT = 10 mA |
VOUT = 2.8 V, IOUT = 150 mA |
VOUT = 2.8 V |
IOUT = 200 mA |
VOUT = 1.2 V, IOUT = 0 mA |
VOUT = 1.2 V, IOUT = 0 mA |
VOUT = 1.2 V |
VOUT = 1.2 V |
VOUT = 1.2 V |
VOUT = 1.2 V |
VOUT = 2.8 V, IOUT = 30 mA |
VOUT = 3.3 V, IOUT = 30 mA |
VOUT = 1.2 V |
VOUT = 2.8 V |
VOUT = 1.2 V, IOUT = 200 mA |
VOUT = 1.2 V, IOUT = 200 mA |
VOUT = 2.8 V, IOUT = 200 mA |
VOUT = 2.8 V, IOUT = 200 mA |
VOUT = 2.8 V, IOUT = 30 mA |