The TPA2012D2 is a stereo, filter-free, Class-D audio amplifier (Class-D amp) available in a DSBGA or WQFN package. The TPA2012D2 only requires two external components for operation.
The TPA2012D2 features independent shutdown controls for each channel. The gain can be selected to 6, 12, 18, or 24 dB using the G0 and G1 gain select pins. High PSRR and differential architecture provide increased immunity to noise and RF rectification. In addition to these features, a fast start-up time and small package size make the TPA2012D2 class-D amp an ideal choice for both cellular handsets and PDAs.
The TPA2012D2 is capable of driving 1.4 W/Ch at
5 V or 720 mW/Ch at 3.6 V into 8 Ω. The TPA2012D2 is also capable of driving 4 Ω. The TPA2012D2 is thermally limited in DSBGA and may not achieve
2.1 W/Ch for 4 Ω. The maximum output power in the DSBGA is determined by the ability of the circuit board to remove heat. Figure 33 shows thermally limited region of the DSBGA in relation to the WQFN package. The TPA2012D2 provides thermal and short-circuit protection.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPA2012D2 | DSBGA (16) | 2.01 mm × 2.01 mm |
WQFN (20) | 4.00 mm × 4.00 mm |
Changes from E Revision (September 2016) to F Revision
Changes from D Revision (June 2008) to E Revision
DEVICE NO. | SPEAKER AMP TYPE | SPECIAL FEATURE | OUTPUT POWER (M) | PSRR (dB) |
---|---|---|---|---|
TPA2012D2 | Class D | — | 2.1 | 71 |
TPA2016D2 | Class D | AGC/DRC | 2.8 | 80 |
TPA2026D2 | Class D | AGC/DRC | 3.2 | 80 |
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | DSBGA | WQFN | ||
AGND | C3 | 18 | I | Analog ground |
AVDD | D2 | 9 | I | Analog supply (must be same voltage as PVDD) |
G0 | C2 | 15 | I | Gain select (LSB) |
G1 | B2 | 1 | I | Gain select (MSB) |
INL– | B1 | 19 | I | Left channel negative input |
INL+ | A1 | 20 | I | Left channel positive input |
INR– | C1 | 17 | I | Right channel negative input |
INR+ | D1 | 16 | I | Right channel positive input |
NC | — | 6, 10 | — | No internal connection |
OUTL– | A4 | 5 | O | Left channel negative differential output |
OUTL+ | A3 | 2 | O | Left channel positive differential output |
OUTR– | D4 | 11 | O | Right channel negative differential output |
OUTR+ | D3 | 14 | O | Right channel positive differential output |
PGND | C4 | 4, 12 | I | Power ground |
PVDD | A2 | 3, 13 | I | Power supply (must be same voltage as AVDD) |
SDL | B4 | 7 | I | Left channel shutdown terminal (active low) |
SDR | B3 | 8 | I | Right channel shutdown terminal (active low) |
Thermal Pad | — | — | — | Connect the thermal pad of WQFN package to PCB GND |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Supply voltage, VSS (AVDD, PVDD) | Active mode | –0.3 | 6 | V |
Shutdown mode | –0.3 | 7 | ||
Input voltage, VI | –0.3 | VDD + 0.3 | V | |
Continuous total power dissipation | See Dissipation Rating Table | |||
Operating junction temperature, TJ | –40 | 150 | °C | |
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1500 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VSS | Supply voltage, AVDD, PVDD | 2.5 | 5.5 | V |
VIH | High-level input voltage, SDL, SDR, G0, G1 | 1.3 | V | |
VIL | Low-level input voltage, SDL, SDR, G0, G1 | 0.35 | V | |
TA | Operating free-air temperature | –40 | 85 | °C |
THERMAL METRIC(1) | TPA2012D2 | UNIT | ||
---|---|---|---|---|
YZH (DSBGA) | RTJ (WQFN) | |||
16 PINS | 20 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 71.4 | 34.6 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 0.4 | 34.3 | °C/W |
RθJB | Junction-to-board thermal resistance | 14 | 11.5 | °C/W |
ψJT | Junction-to-top characterization parameter | 1.8 | 0.4 | °C/W |
ψJB | Junction-to-board characterization parameter | 13.3 | 11.6 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | — | 3.2 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
|VOO| | Output offset voltage (measured differentially) | Inputs ac grounded, AV = 6 dB, VDD = 2.5 to 5.5 V | 5 | 25 | mV | ||
PSRR | Power supply rejection ratio | VDD = 2.5 to 5.5 V | –75 | –55 | dB | ||
Vicm | Common-mode input voltage | 0.5 | VDD – 0.8 | V | |||
CMRR | Common-mode rejection ration | Inputs shorted together, VDD = 2.5 to 5.5 V | –69 | –50 | dB | ||
|IIH| | High-level input current | VDD = 5.5 V, VI = VDD | 50 | µA | |||
|IIL| | Low-level input current | VDD = 5.5 V, VI = 0 V | 5 | µA | |||
IDD | Supply current | VDD = 5.5 V, no load or output filter | 6 | 9 | mA | ||
VDD = 3.6 V, no load or output filter | 5 | 7.5 | |||||
VDD = 2.5 V, no load or output filter | 4 | 6 | |||||
Shutdown mode | 1.5 | µA | |||||
rDS(on) | Static drain-source on-state resistance | VDD = 5.5 V | 500 | mΩ | |||
VDD = 3.6 V | 570 | ||||||
VDD = 2.5 V | 700 | ||||||
Output impedance in shutdown mode | V(SDR, SDL)= 0.35 V | 2 | kΩ | ||||
f(sw) | Switching frequency | VDD = 2.5 V to 5.5 V | 250 | 300 | 350 | kHz | |
Closed-loop voltage gain | G0, G1 = 0.35 V | 5.5 | 6 | 6.5 | dB | ||
G0 = VDD, G1 = 0.35 V | 11.5 | 12 | 12.5 | ||||
G0 = 0.35 V, G1 = VDD | 17.5 | 18 | 18.5 | ||||
G0, G1 = VDD | 23.5 | 24 | 24.5 | ||||
OPERATING CHARACTERISTICS, RL = 8 Ω | |||||||
PO | Output power (per channel) | RL = 8 Ω | VDD = 5 V, f = 1 kHz, THD = 10% |
1.4 | W | ||
VDD = 3.6 V, f = 1 kHz, THD = 10% |
0.72 | ||||||
RL = 4 Ω | VDD = 5 V, f = 1 kHz, THD = 10% |
2.1 | |||||
THD+N | Total harmonic distortion plus noise | PO = 1 W, VDD = 5 V, AV = 6 dB, f = 1 kHz | 0.14% | ||||
PO = 0.5 W, VDD = 5 V, AV = 6 dB, f = 1 kHz | 0.11% | ||||||
Channel crosstalk | f = 1 kHz | –85 | dB | ||||
kSVR | Supply ripple rejection ratio | VDD = 5 V, AV = 6 dB, f = 217 Hz | –77 | dB | |||
VDD = 3.6 V, AV = 6 dB, f = 217 Hz | –73 | ||||||
CMRR | Common mode rejection ratio | VDD = 3.6 V, VIC = 1 Vpp, f = 217 Hz | –69 | dB | |||
Input impedance | Av = 6 dB | 28.1 | kΩ | ||||
Av = 12 dB | 17.3 | ||||||
Av = 18 dB | 9.8 | ||||||
Av = 24 dB | 5.2 | ||||||
Start-up time from shutdown | VDD = 3.6 V | 3.5 | ms | ||||
Vn | Output voltage noise | VDD = 3.6 V, f = 20 to 20 kHz, inputs are ac grounded, AV = 6 dB |
No weighting | 35 | µV | ||
A weighting | 27 |
PACKAGE | TA = 25°C POWER RATING(1) |
DERATING FACTOR |
TA = 75°C POWER RATING |
TA = 85°C POWER RATING |
---|---|---|---|---|
RTJ | 5.2 W | 41.6 mW/°C | 3.12 W | 2.7 W |
YZH | 1.2 W | 9.12 mW/°C | 690 mW | 600 mW |
All parameters are measured according to the conditions described in the Specifications. Figure 34 shows the setup used for the typical characteristics of the test device.
The TPA2012D2 is capable of driving 1.4 W/Ch at 5-V or 720 mW/Ch at 3.6-V into 8 Ω. The TPA2012D2 is also capable of driving a load of 4 Ω.
The TPA2012D2 feature independent shutdown controls for each channel. High PSRR and differential architecture provide increased immunity to noise and RF rectification. The TPA2012D2 provides thermal and short-circuit protection.
The TPA2012D2 has 4 selectable fixed gains: 6 dB, 12 dB, 18 dB, and 24 dB. Connect the G0 and G1 pins as shown in Table 1.
G1 | G0 | GAIN (V/V) |
GAIN (dB) |
INPUT IMPEDANCE (RI, kΩ) |
---|---|---|---|---|
0 | 0 | 2 | 6 | 28.1 |
0 | 1 | 4 | 12 | 17.3 |
1 | 0 | 8 | 18 | 9.8 |
1 | 1 | 16 | 24 | 5.2 |
TPA2012D2 goes to low duty cycle mode when a short-circuit event happens. To return to normal duty cycle mode, the device must be reset. The shutdown mode can be set through the SDL and SDR pins, or the device can be turned off and turned on to return to normal duty cycle mode. This feature protects the device without affecting long-term reliability.
In using Class-D amplifiers with CODECs and DACs, sometimes there is an increase in the output noise floor from the audio amplifier. This occurs when mixing of the output frequencies of the CODEC and DAC mix with the switching frequencies of the audio amplifier input stage. The noise increase can be solved by placing a low-pass filter between the CODEC, DAC, and audio amplifier. This filters off the high frequencies that cause the problem and allow proper performance. The recommended resistor value is 100 Ω and the capacitor value of 47 nF. Figure 35 shows the typical input filter.
A ferrite bead filter can often be used if the design is failing radiated emissions without an LC filter and the frequency sensitive circuit is greater than 1 MHz. This filter functions well for circuits that just have to pass FCC and CE because FCC and CE only test radiated emissions greater than 30 MHz. When choosing a ferrite bead, choose one with high impedance at high frequencies, and very low impedance at low frequencies. In addition, select a ferrite bead with adequate current rating to prevent distortion of the output signal.
Use an LC output filter if there are low frequency (< 1 MHz) EMI sensitive circuits and/or there are long leads from amplifier to speaker.
Figure 36 shows typical ferrite bead and LC output filters.
The TPA2012D2 amplifier can be put in shutdown mode when asserting SDR and SDL pins to a logic LOW. While in shutdown mode, the device output stage is turned off and the current consumption is very low.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
These typical connection diagrams highlight the required external components and system level connections for proper operation of the device. Each of these configurations can be realized using the evaluation modules (EVMs) for the device. These flexible modules allow full evaluation of the device in the most common modes of operation. Any design variation can be supported by TI through schematic and layout reviews. Visit e2e.ti.com for design assistance and join the audio amplifier discussion forum for additional information.
For this design example, use the parameters listed in Table 2.
PARAMETER | VALUE |
---|---|
Power supply | 5 V |
Enable inputs | High > 1.3 V |
Low < 0.35 V | |
Speaker | 8 Ω |
Temperature and applied DC voltage influence the actual capacitance of high-K materials. Table 3 shows the relationship between the different types of high-K materials and their associated tolerances, temperature coefficients, and temperature ranges. Notice that a capacitor made with X5R material can lose up to 15% of its capacitance within its working temperature range.
In an application, the working capacitance of components made with high-K materials is generally much lower than nominal capacitance. A worst-case result with a typical X5R material might be –10% tolerance, –15% temperature effect, and –45% DC voltage effect at 50% of the rated voltage. This particular case would result in a working capacitance of 42% (0.9 × 0.85 × 0.55) of the nominal value.
Select high-K ceramic capacitors according to the following rules:
The preceding rules and recommendations apply to capacitors used in connection with the TPA2012D2. The TPA2012D2 cannot meet its performance specifications if the rules and recommendations are not followed.
MATERIAL | COG/NPO | X7R | X5R |
---|---|---|---|
Typical tolerance | ±5% | ±10% | 80% to –20% |
Temperature | ±30 ppm | ±15% | 22% to –82% |
Temperature range (°C) | –55°C to 125°C | –55°C to 125°C | –30°C to 85°C |
The TPA2012D2 is a high-performance Class-D audio amplifier that requires adequate power supply decoupling to ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency transients, spikes, or digital hash on the line a good low equivalent-series-resistance (ESR) ceramic capacitor, typically
1 µF, placed as close as possible to the device PVDD lead works best. Placing this decoupling capacitor close to the TPA2012D2 is important for the efficiency of the Class-D amplifier, because any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. For filtering lower-frequency noise signals, a 4.7 µF or greater capacitor placed near the audio power amplifier would also help, but it is not required in most applications because of the high PSRR of this device.
The TPA2012D2 does not require input coupling capacitors if the design uses a differential source that is biased from 0.5 V to VDD – 0.8 V. If the input signal is not biased within the recommended common-mode input range, if high-pass filtering is needed (see Figure 37), or if using a single-ended source (see Figure 38), input coupling capacitors are required.
The input capacitors and input resistors form a high-pass filter with the corner frequency, fc, determined in Equation 1.
The value of the input capacitor is important to consider as it directly affects the bass (low frequency) performance of the circuit. Speakers in wireless phones cannot usually respond well to low frequencies, so the corner frequency can be set to block low frequencies in this application. Not using input capacitors can increase output offset.
Equation 2 is used to solve for the input coupling capacitance.
If the corner frequency is within the audio band, the capacitors should have a tolerance of ±10% or better, because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below.
For application curves, see the figures listed in Table 4.
For this design example, use the parameters listed in Table 2.
For the design procedure, see Detailed Design Procedure from the previous example.
For application curves, see the figures listed in Table 4.
The TPA2012D2 is designed to operate from an input voltage supply range from 2.5 V to 5.5 V. Therefore, the output voltage range of the power supply must be within this range. The current capability of upper power must not exceed the maximum current limit of the power switch.
The TPA2012D2 requires adequate power supply decoupling to ensure a high efficiency operation with low total harmonic distortion (THD). Place a low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1-µF, within 2 mm of the PVDD/AVDD pins. This choice of capacitor and placement helps with higher frequency transients, spikes, or digital hash on the line. In addition to the 0.1-µF ceramic capacitor, TI recommends placing a 2.2-µF to 10-µF capacitor on the PVDD/AVDD supply trace. This larger capacitor acts as a charge reservoir, providing energy faster than the board supply, thus helping to prevent any droop in the supply voltage.
In making the pad size for the DSBGA balls, TI recommends that the layout use non-solder mask defined (NSMD) land. With this method, the solder mask opening is made larger than the desired land area, and the opening size is defined by the copper pad width. Figure 39 and Table 5 shows the appropriate diameters for a DSBGA layout. The TPA2012D2 evaluation module (EVM) layout is shown in the next section as a layout example.
SOLDER PAD DEFINITIONS |
COPPER PAD |
SOLDER MASK(5)
OPENING |
COPPER THICKNESS |
STENCIL(6)(7)
OPENING |
STENCIL THICKNESS |
---|---|---|---|---|---|
Nonsolder mask defined (NSMD) | 275 µm (+0.0, –25 µm) |
375 µm (+0.0, –25 µm) | 1 oz max (32 µm) | 275 µm × 275 µm (square) (rounded corners) |
125 µm |
Place all the external components very close to the TPA2012D2. Placing the decoupling capacitor, CS, close to the TPA2012D2 is important for the efficiency of the Class-D amplifier. Any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency.
Recommended trace width at the solder balls is 75 µm to 100 µm to prevent solder wicking onto wider PCB traces.
For high current pins (PVDD, PGND, and audio output pins) of the TPA2012D2, use 100-µm trace widths at the solder balls and at least 500-µm PCB traces to ensure proper performance and output power for the device.
For the remaining signals of the TPA2012D2, use 75-µm to 100-µm trace widths at the solder balls. The audio input pins (INR± and INL±) must run side-by-side to maximize common-mode noise cancellation.
The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factor for the packages are shown in the dissipation rating table. Converting this to θJA for the WQFN package with Equation 3.
Given θJA of 24°C/W, the maximum allowable junction temperature of 150°C, and the maximum internal dissipation of 1.5 W (0.75 W per channel) for 2.1 W per channel, 4-Ω load, 5-V supply, from Figure 25, the maximum ambient temperature can be calculated with Equation 4.
Equation 4 shows that the calculated maximum ambient temperature is 114°C at maximum power dissipation with a 5-V supply and a 4-Ω load. The TPA2012D2 is designed with thermal protection that turns the device off when the junction temperature surpasses 150°C to prevent damage to the IC. Also, using speakers more resistive than 4-Ω dramatically increases the thermal performance by reducing the output current and increasing the efficiency of the amplifier.
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