SLVSCG3F
January 2014 – July 2017
TPS22968
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application Schematic
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics (VBIAS = 5 V)
7.6
Electrical Characteristics (VBIAS = 2.5 V)
7.7
Switching Characteristics
7.8
Typical DC Characteristics
7.9
Typical AC Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
ON and OFF Control
9.3.2
Input Capacitor (Optional)
9.3.3
Output Capacitor (Optional)
9.3.4
QOD (Optional)
9.3.5
VIN and VBIAS Voltage Range
9.3.6
Adjustable Rise Time
9.4
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.1.1
Parallel Configuration
10.1.2
Standby Power Reduction
10.1.3
Power Supply Sequencing Without a GPIO Input
10.1.4
Reverse Current Blocking
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
VIN to VOUT Voltage Drop
10.2.2.2
Inrush Current
10.2.2.3
Thermal Considerations
10.2.3
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Device Support
13.1.1
Development Support
13.2
Documentation Support
13.2.1
Related Documentation
13.3
Related Links
13.4
Receiving Notification of Documentation Updates
13.5
Community Resources
13.6
Trademarks
13.7
Electrostatic Discharge Caution
13.8
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DPU|14
MPSS042A
Thermal pad, mechanical data (Package|Pins)
DPU|14
QFND320
Orderable Information
slvscg3f_oa
slvscg3f_pm
1
Features
Integrated Dual Channel Load Switch
Input Voltage Range: 0.8 V to 5.5 V
VBIAS Voltage Range: 2.5 V to 5.5 V
Ideal for 1S Battery Configuration
Ultra-Low R
ON
Resistance
R
ON
= 27 mΩ at V
IN
= 5 V (V
BIAS
= 5 V)
R
ON
= 25 mΩ at V
IN
= 3.3 V (V
BIAS
= 5 V)
R
ON
= 25 mΩ at V
IN
= 1.8 V (V
BIAS
= 5 V)
4-A Maximum Continuous Switch Current per Channel
Low Quiescent Current
55 µA at V
BIAS
= 5 V (Both Channels)
55 µA at V
BIAS
= 5 V (Single Channel)
Low Control Input Threshold Enables Use of
1.2-,1.8-, 2.5-, 3.3-V Logic
Configurable Rise Time
(1)
Quick Output Discharge (QOD)
(2)
(Optional)
SON 14-Pin Package with Thermal Pad
ESD Performance Tested per JEDEC Standard
2-kV HBM and 1-kV CDM
Latch-Up Performance Exceeds 100 mA per JESD 78, Class II
GPIO Enable – Active High
TPS22968N: Product Preview Only
(1)
(2)
1.
See the
Application Information
section for CT value vs. rise time
2.
This feature discharges the output of the switch to GND through a 270-Ω resistor, preventing the output from floating.