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  • TPS51100 3-A Sink / Source DDR Termination Regulator

    • SLUS600E April   2004  – December 2014 TPS51100

      PRODUCTION DATA.  

  • CONTENTS
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  • TPS51100 3-A Sink / Source DDR Termination Regulator
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VTT Sink/Source Regulator
      2. 7.3.2 VTTREF Regulator
      3. 7.3.3 Soft-Start
      4. 7.3.4 VTT Current Protection
      5. 7.3.5 VIN UVLO Protection
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 S5 Control and Soft-Off
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Capacitor
        2. 8.2.2.2 Input Capacitor
        3. 8.2.2.3 VIN Capacitor
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
  13. IMPORTANT NOTICE

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGQ|10
Thermal pad, mechanical data (Package|Pins)
  • DGQ|10
    • PPTD325B
Orderable Information
  • slus600e_oa
  • slus600e_pm
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DATA SHEET

TPS51100 3-A Sink / Source DDR Termination Regulator

1 Features

  • Input Voltage Range: 4.75 V to 5.25 V
  • VLDOIN Voltage Range: 1.2 V to 3.6 V
  • 3-A Sink/Source Termination Regulator Includes Droop Compensation
  • Requires Only 20-μF Ceramic Output Capacitance
  • Supports Hi-Z in S3 and Soft-Off in S5
  • 1.2-V Input (VLDOIN) Helps Reduce Total Power Dissipation
  • Integrated Divider Tracks 0.5 VDDQSNS for VTT and VTTREF
  • Remote Sensing (VTTSNS)
  • ±20-mV Accuracy for VTT and VTTREF
  • 10-mA Buffered Reference (VTTREF)
  • Built-In Soft-Start, UVLO, and OCL
  • Thermal Shutdown
  • Supports JEDEC Specifications

2 Applications

  • DDR, DDR2, DDR3 Memory Termination
  • SSTL-2, SSTL-18, and HSTL Termination

3 Description

The TPS51100 is a 3-A, sink/source tracking termination regulator. The device is specifically designed for low-cost and low-external component count systems where space is a premium.

The TPS51100 maintains fast transient response, only requiring 20 μF (2 × 10 μF) of ceramic output capacitance. The TPS51100 supports remote sensing functions and all features required to power the DDR and DDR2 VTT bus termination according to the JEDEC specification. The part also supports DDR3 VTT termination with VDDQ at 1.5 V (typical). In addition, the TPS51100 includes integrated sleep-state controls, placing VTT in Hi-Z in S3 (suspend to RAM) and soft-off for VTT and VTTREF in S5 (suspend to disk). The TPS51100 is available in the thermally efficient 10-pin MSOP PowerPAD™ package and is specified from –40°C to 85°C.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS51100 HVSSOP (10) 3.00 mm x 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Simplified Schematic

v04015_lus600.gif

4 Revision History

Changes from D Revision (May 2012) to E Revision

  • Added Pin Configuration and Functions section, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go

Changes from C Revision (June 2008) to D Revision

  • Added updated Thermal dataGo

5 Pin Configuration and Functions

p0083-01_lus600_.gif
For more information on the DGQ package, see the PowerPAD Thermally Enhanced Package application report (SLMA002).

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
GND 8 – Signal ground. Connect to negative terminal of the output capacitor
PGND 4 – Power ground output for the VTT LDO
S3 7 I S3 signal input
S5 9 I S5 signal input
VDDQSNS 1 I VDDQ sense input
VIN 10 I 5-V power supply
VLDOIN 2 I Power supply for the VTT LDO and VTTREF output stage
VTT 3 O Power output for the VTT LDO
VTTREF 6 O VTT reference output. Connect to GND through 0.1-μF ceramic capacitor.
VTTSNS 5 I Voltage sense input for the VTT LDO. Connect to plus terminal of the output capacitor.

 
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