SLVSAG1C December   2010  – December 2015 TPS54327

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Operation
      2. 7.3.2 PWM Frequency and Adaptive ON-Time Control
      3. 7.3.3 Soft-Start and Prebiased Soft-Start
      4. 7.3.4 Current Protection
      5. 7.3.5 UVLO Protection
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Forced CCM Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Resistors Selection
        2. 8.2.2.2 Output Filter Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Bootstrap Capacitor Selection
        5. 8.2.2.5 VREG5 Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • D-CAP2™ Mode Enables Fast Transient Response
  • Low-Output Ripple and Allows Ceramic Output Capacitor
  • Wide VIN Input Voltage Range: 4.5 V to 18 V
  • Output Voltage Range: 0.76 V to 7 V
  • Highly Efficient Integrated FETs Optimized
    for Lower Duty Cycle Applications
    – 100 mΩ (High-Side) and 70 mΩ (Low-Side)
  • High Efficiency, Less Than 10 μA at shutdown
  • High Initial Bandgap Reference Accuracy
  • Adjustable Soft Start
  • Prebiased Soft Start
  • 700-kHz Switching Frequency (fSW)
  • Cycle-By-Cycle Overcurrent Limit

2 Applications

  • Wide Range of Applications for Low Voltage System
    • Digital TV Power Supply
    • High Definition Blu-ray Disc™ Players
    • Networking Home Terminal
    • Digital Set Top Box (STB)

3 Description

The TPS54327 device is an adaptive on-time D-CAP2™ mode synchronous buck converter. TheTPS54327 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54327 uses the D-CAP2 mode control which provides a fast transient response with no external compensation components. The TPS54327 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54327 is available in the 8-pin DDA package and 10-pin DRC, and is designed to operate from –40°C to 85°C.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS54327 HSOP (8) 4.89 mm × 3.90 mm
VSON (10) 3.00 mm × 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

TPS54327 FP_DS_12.gif

TPS54327 Transient Response

TPS54327 respons_lvsag1.gif