SLVSE54A
April 2018 – December 2018
TPS563249
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Schematic
TPS563249 Efficiency
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Adaptive On-Time Control and PWM Operation
7.3.2
Soft Start and Pre-Biased Soft Start
7.3.3
Current Protection
7.3.4
Undervoltage Lockout (UVLO) Protection
7.3.5
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Normal Operation
7.4.2
Standby Operation
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Output Voltage Resistors Selection
8.2.2.2
Output Filter Selection
8.2.2.3
Input Capacitor Selection
8.2.2.4
Bootstrap Capacitor Selection
8.2.2.5
Dropout
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Receiving Notification of Documentation Updates
11.2
Community Resources
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDC|6
MPDS124I
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvse54a_oa
slvse54a_pm
1
Features
3-A Converter Integrated 70-mΩ and 30-mΩ FETs
D-CAP3™ Mode Control with Fast Transient Response
Input Voltage Range: 4.5 V to 17 V
Output Voltage Range: 0.6 V to 7 V
Forced Continuous Conduction Mode
Constant 1.4-MHz Switching Frequency
Low Shutdown Current Less than 10 µA
1% Feedback Voltage Accuracy (25ºC)
Startup from Pre-Biased Output Voltage
Cycle-by-Cycle Overcurrent Limit
Hiccup-mode Overcurrent Protection
Non-Latch UVP and TSD Protections
Fixed Soft Start: 1.7 ms