The TPS6305x family of devices is a high efficiency, low quiescent-current buck-boost converter, suitable for applications where the input voltage is higher or lower than the output.
Continuous output current can go as high as 500 mA in boost mode and as high as 1 A in buck mode. The maximum average current in the switches is limited to a typical value of 1 A. The TPS6305x family of devices regulate the output voltage over the complete input voltage range by automatically switching between buck or boost mode depending on the input voltage, ensuring seamless transition between modes.
The buck-boost converter is based on a fixed-frequency, pulse-width-modulation (PWM) controller using synchronous rectification to obtain the highest efficiency. At low load currents, the converter enters Power Save Mode to maintain high efficiency over the complete load current range.
The PFM/PWM pin allows the user to select between automatic-PFM/PWM mode operation and forced-PWM operation. During PWM mode a fixed-frequency of typically 2.5 MHz is used. The output voltage is programmable using an external resistor divider, or is fixed internally on the chip. The converter can be disabled to minimize battery drain. During shutdown, the load is disconnected from the battery. The device is packaged in a 12-pin DSBGA and in a 12-pin HotRod package.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPS63050
TPS63051 |
DSBGA (12) | 1.56 mm x 1.16 mm |
VQFN (12) | 2.50 mm × 2.50 mm |
Changes from C Revision (July 2015) to D Revision
Changes from B Revision (April 2015) to C Revision
Changes from A Revision (February 2014) to B Revision
Changes from * Revision (July 2013) to A Revision
PART NUMBER (1) | VOUT | |
---|---|---|
TPS63050 | Adjustable | |
TPS63051 | 3.3 V |
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | WCSP | HotRod | ||
EN | A3 | 11 | I | Enable input. (1 enabled, 0 disabled). It must not be left floating |
FB | D2 | 5 | I | Voltage feedback of adjustable versions, must be connected to VOUT on fixed output voltage versions1 |
GND | B1 | 2,9 | Ground for Power stage and Control stage | |
ILIM0 | B2 | 10 | I | Programmable inrush current limit input works together with lLIM1. See table on page 1.
It must not be left floating |
ILIM1 | B3 | See (1) | I | Programmable inrush current limit input works together with lLIM0.
See Efficiency vs Output Current on page 1. Do not leave floating |
L1 | A1 | 1 | Connection for Inductor | |
L2 | C1 | 3 | Connection for Inductor | |
PFM/PWM | C2 | 6 | I | 0 for PFM mode 1 for forced PWM mode. It must not be left floating |
PG | C3 | 8 | O | Power good open drain output |
SS | D3 | 7 | I | Adjustable Soft-Start. If left floating default soft-start time is set |
VIN | A2 | 12 | I | Supply voltage for power stage and control stage |
VOUT | D1 | 4 | O | Buck-boost converter output |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage(1) | VIN, L1, EN, VOUT, FB, VINA, PFM/PWM | –0.3 | 7 | V |
L2(2) | –0.3 | 7 | ||
L2(3) | –0.3 | 9.5 | ||
Operating junction temperature, TJ | –40 | 150 | °C | |
Operating ambient temperature, TA | –40 | 85 | °C | |
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±1500 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±700 |
See (1) | MIN | NOM | MAX | UNIT | |
---|---|---|---|---|---|
VIN | Input voltage | 2.5 | 5.5 | V | |
IOUT | Output current | 0.5 | A | ||
L | Inductance(3) | 1 | 1.5 | 2.2 | µH |
COUT | Output capacitance(2) | 10 | µF | ||
TA | Operating ambient temperature | –40 | 85 | °C | |
TJ | Operating virtual junction temperature | –40 | 125 | °C |
THERMAL METRIC(1) | TPS6305x | UNIT | ||
---|---|---|---|---|
WCSP | RMW | |||
12 PINS | 12 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 89.9 | 37.3 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 0.7 | 30.4 | °C/W |
RθJB | Junction-to-board thermal resistance | 43.9 | 8.0 | °C/W |
ψJT | Junction-to-top characterization parameter | 2.9 | 0.4 | °C/W |
ψJB | Junction-to-board characterization parameter | 43.7 | 7.8 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | n/a | 2.5 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|---|---|
SUPPLY | ||||||||
VIN | Input voltage range | 2.5 | 5.5 | V | ||||
VIN_Min | Minimum input voltage to turn on in full load | IOUT = 500 mA | 2.7 | V | ||||
IOUT | Output current(3) | ILIM0 = VIH, ILIM1 = VIH, | 500 | mA | ||||
IQ | Quiescent current (2) | VIN | IOUT = 0 mA, EN = VIN = 3.6 V,
VOUT = 3.3 V |
43 | 65 | μA | ||
VOUT | IOUT = 0 mA, EN = VIN = 3.6 V,
VOUT = 3.3 V |
10 | ||||||
Isd | Shutdown current (2) | EN = 0 V | 0.1 | 1 | μA | |||
UVLOTH | Undervoltage lockout threshold | VIN falling | 1.6 | 1.7 | 1.8 | V | ||
UVLOhys | Undervoltage lockout hysteresis | 200 | mV | |||||
TSD | Thermal shutdown | Temperature rising | 140 | °C | ||||
TSD(hys) | Thermal shutdown hysteresis | 20 | °C | |||||
LOGIC SIGNALS EN, ILIM0, ILIM1 | ||||||||
VIH | High level input voltage | VIN = 2.5 V to 5.5 V | 1.2 | V | ||||
VIL | Low level voltage Input Voltage | VIN = 2.5 V to 5.5 V | 0.3 | V | ||||
Ilkg | Input leakage current | PFM / PWM, EN, ILIM0, ILIM1 = GND or VIN | 0.01 | 0.1 | μA | |||
POWER GOOD | ||||||||
VOL | Low level voltage | Isink = 100 μA | 0.3 | V | ||||
IPG | PG sinking current | V = 0.3 V | 0.1 | mA | ||||
Ilkg | Input leakage current | VPG = 3.6 V | 0.01 | 0.1 | μA | |||
OUTPUT | ||||||||
VOUT | Output voltage range | 2.5 | 5.5 | V | ||||
VFB | TPS63050 feedback regulation voltage | 0.8 | V | |||||
VFB | TPS63050 feedback voltage accuracy | PWM mode | –1.1% | 1.1% | ||||
VFB | TPS63050 feedback voltage accuracy(1) | PFM mode | –1% | 3% | ||||
VOUT | TPS63051 output voltage accuracy | PWM mode | 3.27 | 3.3 | 3.34 | V | ||
VOUT | TPS63051 output voltage accuracy(1) | PFM mode | 3.27 | 3.3 | 3.39 | V | ||
IPWM->PFM | Minimum output current to enter PFM mode | VIN = 3 V; VOUT = 3.3 V | 150 | mA | ||||
IFB | TPS63050 feedback input bias current | VFB = 0.8 V | 10 | 100 | nA | |||
RDS(on) | Input high-side FET on-resistance | ISW = 500 mA | 145 | mΩ | ||||
Output high-side FET on-resistance | ISW = 500 mA | 95 | mΩ | |||||
Input low-side FET on-resistance | ISW = 500 mA | 170 | mΩ | |||||
Output low-side FET on-resistance | ISW = 500 mA | 115 | mΩ | |||||
IIN_MAX | Input current-limit boost mode | ILIM0 = VIH, ILIM1 = VIH,VIN = 2.7 V to 3 V, VOUT = 3 V | 480 | 1240 | mA | |||
ILIM0 = VIH, ILIM1 = VIH,VIN = 2.7 V to 3.3 V, VOUT = 3.3 V, | 550 | 1400 | mA | |||||
ILIM0 = VIH, ILIM1 = VIH,VIN = 2.7 V to 4.5 V, VOUT = 4.5 V, | 630 | 1950 | mA | |||||
ISS_IN | Programmable inrush current limit(4) | ILIM0 = VIL, ILIM1 = VIL,
VIN = 3 V,VOUT = 3.3 V, (Available for DBGA only) |
0.4×IIN_MAX | mA | ||||
ILIM0 = VIH, ILIM1 = VIL,
VIN = 3 V,VOUT = 3.3 V, (Available for DBGA only) |
0.5×IIN_MAX | |||||||
ILIM0 = VIL, ILIM1 = VIH,
VIN = 3 V,VOUT = 3.3 V |
0.65×IIN_MAX | |||||||
ILIM0 = VIH, ILIM1 = VIH,
VIN = 3 V,VOUT = 3.3 V |
IIN_MAX | |||||||
ISS | Soft-start current TPS63051 | 1 | μA | |||||
ISS | Soft-start current TPS63050 | 3.2 | μA | |||||
Line regulation | VIN = 2.5 V to 5.5 V, IOUT = 500 mA, PWM mode | 0.963 | mV/V | |||||
Load regulation | VIN = 3.6 V, IOUT = 0 mA to 500 mA, PWM mode | 4 | mV/A |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|---|---|
OUTPUT | ||||||||
fs | Switching frequency | 2.5 | MHz | |||||
tSS | Softstart time | VOUT = EN = low to high, SS = floating, Buck mode VIN = 3.6 V, VOUT = 3.3 V, IOUT = 500 mA(4) | 280 | µs | ||||
VOUT = EN = low to high, SS = floating, Boost mode VIN = 2.5 V, VOUT = 3.3 V, IOUT = 500 mA(4) | 600 | |||||||
td | Start up delay | Time from when EN = high to when device starts switching | 100 | µs |
The TPS6305x devices use 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible operating conditions. This enables the device to keep high efficiency over the complete input voltage and output power range. To regulate the output voltage at all possible input voltage conditions, the device automatically switches from buck operation to boost operation and back as required by the configuration. It always uses one active switch, one rectifying switch, one switch held on, and one switch held off. Therefore, it operates as a buck converter when the input voltage is higher than the output voltage, and as a boost converter when the input voltage is lower than the output voltage. There is no mode of operation in which all 4 switches are switching at the same time. Keeping one switch on and one switch off eliminates their switching losses. The RMS current through the switches and the inductor is kept at a minimum, to minimize switching and conduction losses. Controlling the switches this way allows the converter to always keep higher efficiency.
The device provides a seamless transition from buck to boost or from boost to buck operation.