DS50PCI402

ACTIVE

2.5/5.0-Gbps 4-lane PCI Express redriver with equalization and De-Emphasis

Product details

Type Redriver Protocols General purpose, PCIe1, PCIe2, sRIO Applications Backplane, Front Port, Peripheral I/O Number of channels 8 Speed (max) (Gbpp) 5 Supply voltage (V) 2.5 Rating Catalog Operating temperature range (°C) -10 to 85
Type Redriver Protocols General purpose, PCIe1, PCIe2, sRIO Applications Backplane, Front Port, Peripheral I/O Number of channels 8 Speed (max) (Gbpp) 5 Supply voltage (V) 2.5 Rating Catalog Operating temperature range (°C) -10 to 85
WQFN (NJY) 54 55 mm² 10 x 5.5
  • Input and Output signal conditioning increases PCIe reach in backplanes and cables
  • 0.09 UI of residual deterministic jitter at 5Gbps after 42” of FR4 (with Input EQ)
  • 0.11 UI of residual deterministic jitter at 5Gbps after 7m of PCIe Cable (with Input EQ)
  • 0.09 UI of residual deterministic jitter at 5Gbps with 28” of FR4 (with Output DE)
  • 0.13 UI of residual deterministic jitter at 5Gbps with 7m of PCIe Cable (with Output DE)
  • Adjustable Transmit VOD 800 to 1200mVp-p
  • Automatic and manual Receiver Detection and input termination control circuitry
  • Automatic power management on an individual lane basis via SMBus
  • Adjustable electrical idle detect threshold.
  • Data rate optimized 3-stage equalization to 27 dB gain
  • Data rate optimized 6-level 0 to 12 dB transmit de-emphasis
  • Flow-thru pinout in 10mmx5.5mm 54-pin leadless WQFN package
  • Single supply operation at 2.5V
  • >6kV HBM ESD rating
  • -10 to 85°C operating temperature range

All trademarks are the property of their respective owners.

  • Input and Output signal conditioning increases PCIe reach in backplanes and cables
  • 0.09 UI of residual deterministic jitter at 5Gbps after 42” of FR4 (with Input EQ)
  • 0.11 UI of residual deterministic jitter at 5Gbps after 7m of PCIe Cable (with Input EQ)
  • 0.09 UI of residual deterministic jitter at 5Gbps with 28” of FR4 (with Output DE)
  • 0.13 UI of residual deterministic jitter at 5Gbps with 7m of PCIe Cable (with Output DE)
  • Adjustable Transmit VOD 800 to 1200mVp-p
  • Automatic and manual Receiver Detection and input termination control circuitry
  • Automatic power management on an individual lane basis via SMBus
  • Adjustable electrical idle detect threshold.
  • Data rate optimized 3-stage equalization to 27 dB gain
  • Data rate optimized 6-level 0 to 12 dB transmit de-emphasis
  • Flow-thru pinout in 10mmx5.5mm 54-pin leadless WQFN package
  • Single supply operation at 2.5V
  • >6kV HBM ESD rating
  • -10 to 85°C operating temperature range

All trademarks are the property of their respective owners.

The DS50PCI402 is a low power, 4 lane bidirectional buffer/equalizer designed specifically for PCI Express Gen1 and Gen2 applications. The device performs both receive equalization and transmit de-emphasis, allowing maximum flexibility of physical placement within a system. The receiver is capable of opening an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect medium.

The transmitter de-emphasis level can be set by the user depending on the distance from the DS50PCI402 to the PCI Express endpoint. The DS50PCI402 contains PCI Express specific functions such as Transmit Idle, RX Detection, and Beacon signal pass through.

The device provides automatic receive detection circuitry which controls the input termination impedance. By automatically reflecting the current load impedance seen on the outputs back to the corresponding inputs the DS50PCI402 becomes completely transparent to both the PCIe root complex and endpoint. An internal rate detection circuit is included to detect if an incoming data stream is at Gen2 data rates, and adjusts the de-emphasis on it's output accordingly. The signal conditioning provided by the device allows systems to upgrade from Gen1 data rates to Gen2 without reducing their physical reach. This is true for FR4 applications such as backplanes, as well as cable interconnect.

The DS50PCI402 is a low power, 4 lane bidirectional buffer/equalizer designed specifically for PCI Express Gen1 and Gen2 applications. The device performs both receive equalization and transmit de-emphasis, allowing maximum flexibility of physical placement within a system. The receiver is capable of opening an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect medium.

The transmitter de-emphasis level can be set by the user depending on the distance from the DS50PCI402 to the PCI Express endpoint. The DS50PCI402 contains PCI Express specific functions such as Transmit Idle, RX Detection, and Beacon signal pass through.

The device provides automatic receive detection circuitry which controls the input termination impedance. By automatically reflecting the current load impedance seen on the outputs back to the corresponding inputs the DS50PCI402 becomes completely transparent to both the PCIe root complex and endpoint. An internal rate detection circuit is included to detect if an incoming data stream is at Gen2 data rates, and adjusts the de-emphasis on it's output accordingly. The signal conditioning provided by the device allows systems to upgrade from Gen1 data rates to Gen2 without reducing their physical reach. This is true for FR4 applications such as backplanes, as well as cable interconnect.

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 2
Type Title Date
* Data sheet 2.5 / 5.0 Gbps 4 Lane PCI Express Repeater w/Equalization & De-Emphasis datasheet (Rev. H) 04 Mar 2013
User guide DS50PCI401EVK User Guide PCI Express SMA Evaluation Kit 20 Feb 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins CAD symbols, footprints & 3D models
WQFN (NJY) 54 Ultra Librarian

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos