64-pin (PM) package image

SN74ABT18502PMR ACTIVE

Scan Test Devices With 18-Bit Universal Bus Transceiver

ACTIVE custom-reels CUSTOM Custom reel may be available

Pricing

Qty Price
+

Additional package qty | Carrier options These products are exactly the same but come in a different carrier type

SN74ABT18502PM ACTIVE
Package qty | Carrier 160 | JEDEC TRAY (10+1)
Inventory
Qty | Price 1ku | +

Quality information

Rating Catalog
RoHS Yes
REACH Yes
Lead finish / Ball material NIPDAU
MSL rating / Peak reflow Level-3-260C-168 HR
Quality, reliability
& packaging information

Information included:

  • RoHS
  • REACH
  • Device marking
  • Lead finish / Ball material
  • MSL rating / Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
View or download
Additional manufacturing information

Information included:

  • Fab location
  • Assembly location
View

Export classification

*For reference only

  • US ECCN: EAR99

Packaging information

Package | Pins LQFP (PM) | 64
Operating temperature range (°C) -40 to 85
Package qty | Carrier 1,000 | LARGE T&R

Features for the SN74ABT18502

  • Member of the Texas Instruments Widebus™ Family
  • UBT™ Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode
  • Compatible With IEEE Std 1149.1-1990 (JTAG) Test Access Port (TAP) and Boundary-Scan Architecture
  • Includes D-Type Flip-Flops and Control Circuitry to Provide Multiplexed Transmission of Stored and Real-Time Data
  • Two Boundary-Scan Cells (BSCs) Per I/O for Greater Flexibility
  • SCOPE™ Instruction Set
    • IEEE Std 1149.1-1990 Required Instructions, Optional INTEST, and P1149.1A CLAMP and HIGHZ
    • Parallel Signature Analysis (PSA) at Inputs With Masking Option
    • Pseudorandom Pattern Generation (PRPG) From Outputs
    • Sample Inputs/Toggle Outputs (TOPSIP)
    • Binary Count From Outputs
    • Device Identification
    • Even-Parity Opcodes

SCOPE, UBT, and Widebus are trademarks of Texas Instruments.

Description for the SN74ABT18502

The SN74ABT18502 scan test device with an 18-bit universal bus transceiver is a member of the Texas Instruments SCOPE™ testability IC family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of complex circuit board assemblies. Scan access to the test circuitry is accomplished via the four-wire test access port (TAP) interface.

In the normal mode, this device is an 18-bit universal bus transceiver that combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, or clocked modes. The device can be used either as two 9-bit transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPE universal bus transceivers.

Data flow in each direction is controlled by output-enable (OEAB\ and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A-bus data is latched while CLKAB is held at a static low or high logic level. Otherwise, if LEAB is low, A-bus data is stored on a low-to-high transition of CLKAB. When OEAB\ is low, the B outputs are active. When OEAB\ is high, the B outputs are in the high-impedance state. B-to-A data flow is similar to A-to-B data flow but uses the OEBA\, LEBA, and CLKBA inputs.

In the test mode, the normal operation of the SCOPE universal bus transceivers is inhibited, and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry performs boundary scan test operations according to the protocol described in IEEE Std 1149.1-1990.

Four dedicated test pins are used to observe and control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry can perform other testing functions such as parallel signature analysis (PSA) on data inputs and pseudorandom pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface.

Additional flexibility is provided in the test mode through the use of two boundary-scan cells (BSCs) for each I/O pin. This allows independent test data to be captured and forced at either bus (A or B). A PSA/binary count up (PSA/COUNT) instruction is also included to ease the testing of memories and other circuits where a binary count addressing scheme is useful.

Pricing

Qty Price
+

Additional package qty | Carrier options These products are exactly the same but come in a different carrier type

SN74ABT18502PM ACTIVE
Package qty | Carrier 160 | JEDEC TRAY (10+1)
Inventory
Qty | Price 1ku | +

Carrier options

You can choose different carrier options based on the quantity of parts, including full reel, custom reel, cut tape, tube or tray.

A custom reel is a continuous length of cut tape from one reel to maintain lot- and date-code traceability, built to the exact quantity requested. Following industry standards, a brass shim connects an 18-inch leader and trailer on both sides of the cut tape for direct feeding into automated assembly machines. TI includes a reeling fee for custom reel orders.

Cut tape is a length of tape cut from a reel. TI may fulfill orders using multiple strips of cut tapes or boxes to satisfy the quantity requested.

TI often ships tube or tray devices inside a box or in the tube or tray, depending on inventory availability. We pack all tapes, tubes or sample boxes according to internal electrostatic discharge and moisture-sensitivity-level protection requirements.

Learn more

Lot and date code selection may be available

Add a quantity to your cart and begin the checkout process to view the options available to select lot or date codes from existing inventory.

Learn more