SN74AUC1G17

Name: SN74AUC1G17
Brand: TI
SKU: SN74AUC1G17
Price: 0.05 USD

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Single 0.8-V to 2.7-V high speed buffer with Schmitt-Trigger inputs

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Data sheet

document-pdfAcrobat SN74AUC1G17 Single Schmitt-Trigger Buffer datasheet (Rev. O) PDF | HTML

SN74AUC1G17

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Data sheet

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Product details

Technology family

AUC

Supply voltage (min) (V)

0.8

Supply voltage (max) (V)

2.7

Number of channels

1

IOL (max) (mA)

9

Supply current (max) (µA)

10

IOH (max) (mA)

-9

Input type

Schmitt-Trigger

Output type

Push-Pull

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

AUC

Supply voltage (min) (V)

0.8

Supply voltage (max) (V)

2.7

Number of channels

1

IOL (max) (mA)

9

Supply current (max) (µA)

10

IOH (max) (mA)

-9

Input type

Schmitt-Trigger

Output type

Push-Pull

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

DSBGA (YZP)

5

2.1875 mm² 1.75 x 1.25

SOT-23 (DBV)

5

8.12 mm² 2.9 x 2.8

SOT-5X3 (DRL)

5

2.56 mm² 1.6 x 1.6

SOT-SC70 (DCK)

5

4.2 mm² 2 x 2.1

Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial Power Down Mode and Back Drive Protection
Sub 1-V Operable
Maximum t_pd of 2.4 ns at 1.8 V
Low Power Consumption, 10-µA Maximum I_CC
±8-mA Output Drive at 1.8 V

Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial Power Down Mode and Back Drive Protection
Sub 1-V Operable
Maximum t_pd of 2.4 ns at 1.8 V
Low Power Consumption, 10-µA Maximum I_CC
±8-mA Output Drive at 1.8 V

This single Schmitt-trigger buffer is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC1G17 contains one buffer and performs the Boolean function Y = A. The device functions as an independent buffer, but because of Schmitt action, it may have different input threshold levels for positive-going (V_T+) and negative-going (V_T–) signals.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

For more information about AUC Little Logic devices, see Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, SCEA027.

This single Schmitt-trigger buffer is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC1G17 contains one buffer and performs the Boolean function Y = A. The device functions as an independent buffer, but because of Schmitt action, it may have different input threshold levels for positive-going (V_T+) and negative-going (V_T–) signals.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

For more information about AUC Little Logic devices, see Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, SCEA027.

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	Type	Title		Date
*	Data sheet	SN74AUC1G17 Single Schmitt-Trigger Buffer datasheet (Rev. O)	PDF \| HTML	08 Jun 2017
	Application brief	Understanding Schmitt Triggers (Rev. A)	PDF \| HTML	22 May 2019
	Selection guide	Little Logic Guide 2018 (Rev. G)		06 Jul 2018
	Selection guide	Logic Guide (Rev. AB)		12 Jun 2017
	Application note	How to Select Little Logic (Rev. A)		26 Jul 2016
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		02 Dec 2015
	User guide	LOGIC Pocket Data Book (Rev. B)		16 Jan 2007
	Product overview	Design Summary for WCSP Little Logic (Rev. B)		04 Nov 2004
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		08 Jul 2004
	Application note	Selecting the Right Level Translation Solution (Rev. A)		22 Jun 2004
	User guide	Signal Switch Data Book (Rev. A)		14 Nov 2003
	Application note	Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices		21 Mar 2003
	User guide	AUC Data Book, January 2003 (Rev. A)		01 Jan 2003
	Application note	Texas Instruments Little Logic Application Report		01 Nov 2002
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		29 Aug 2002
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards		13 Jun 2002
	More literature	STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS		27 Mar 2002
	More literature	AUC Product Brochure (Rev. A)		18 Mar 2002