SN74CBT16233

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Product details

Configuration 2:1 SPDT Number of channels 16 Power supply voltage - single (V) 5 Protocols Analog Ron (typ) (Ω) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 5.25 Supply voltage (max) (V) 5.25
Configuration 2:1 SPDT Number of channels 16 Power supply voltage - single (V) 5 Protocols Analog Ron (typ) (Ω) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 5.25 Supply voltage (max) (V) 5.25
SSOP (DL) 56 190.647 mm² 18.42 x 10.35 TSSOP (DGG) 56 113.4 mm² 14 x 8.1 TVSOP (DGV) 56 72.32 mm² 11.3 x 6.4
  • Member of the Texas Instruments Widebus™ Family
  • 5- Switch Connection Between Two Ports
  • TTL-Compatible Input Levels

Widebus is a trademark of Texas Instruments.

  • Member of the Texas Instruments Widebus™ Family
  • 5- Switch Connection Between Two Ports
  • TTL-Compatible Input Levels

Widebus is a trademark of Texas Instruments.

The SN74CBT16233 is a 16-bit 1-of-2 FET multiplexer/demultiplexer used in applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single path. This device can be used for memory interleaving, where two different banks of memory need to be addressed simultaneously. The device can be used as two 8-bit to 16-bit multiplexers or as one 16-bit to 32-bit multiplexer.

Two select (SEL1 and SEL2) inputs control the data flow. When the TEST inputs are asserted, the A port is connected to both the B1 and the B2 ports. SEL1, SEL2, and the TEST inputs can be driven with a 5-V CMOS, a 5-V TTL, or a low-voltage TTL driver.

This device is designed so it does not have through current when switching directions.

The SN74CBT16233 is a 16-bit 1-of-2 FET multiplexer/demultiplexer used in applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single path. This device can be used for memory interleaving, where two different banks of memory need to be addressed simultaneously. The device can be used as two 8-bit to 16-bit multiplexers or as one 16-bit to 32-bit multiplexer.

Two select (SEL1 and SEL2) inputs control the data flow. When the TEST inputs are asserted, the A port is connected to both the B1 and the B2 ports. SEL1, SEL2, and the TEST inputs can be driven with a 5-V CMOS, a 5-V TTL, or a low-voltage TTL driver.

This device is designed so it does not have through current when switching directions.

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Technical documentation

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Type Title Date
* Data sheet 16-Bit 1-of-2 FET Multiplexer/Demultiplexer datasheet (Rev. K) 13 Nov 2001
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Digital Bus Switch Selection Guide (Rev. A) 10 Nov 2004
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature CBT RAID Application Clip 12 Jun 2003
Application note Bus FET Switch Solutions for Live Insertion Applications 07 Feb 2003
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 May 2002
Application note Flexible Voltage-Level Translation With CBT Family Devices 20 Jul 1999
User guide CBT (5-V) And CBTLV (3.3-V) Bus Switches Data Book (Rev. B) 01 Dec 1998
Application note 3.3-V to 2.5-V Translation with Texas Instruments Crossbar Technology (Rev. A) 03 Apr 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note 5-V To 3.3-V Translation With the SN74CBTD3384 (Rev. B) 01 Mar 1997
Application note Understanding Advanced Bus-Interface Products Design Guide 01 May 1996

Design & development

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Simulation model

SN74CBT16233 IBIS Model

SCDM016.ZIP (16 KB) - IBIS Model
Package Pins CAD symbols, footprints & 3D models
SSOP (DL) 56 Ultra Librarian
TSSOP (DGG) 56 Ultra Librarian
TVSOP (DGV) 56 Ultra Librarian

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