SN74CBT3125C

Name: SN74CBT3125C
Brand: TI
SKU: SN74CBT3125C
Price: 0.378 USD

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5-V, 1:1 (SPST), 4-channel FET bus switch with –2-V undershoot protection

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Data sheet

document-pdfAcrobat SN74CBT3125C datasheet (Rev. A)

SN74CBT3125C

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Data sheet

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Product details

Configuration

1:1 SPST

Number of channels

4

Power supply voltage - single (V)

5

Protocols

Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART

Ron (typ) (Ω)

3

CON (typ) (pF)

12.5

ON-state leakage current (max) (µA)

10

Bandwidth (MHz)

200

Operating temperature range (°C)

-40 to 85

Features

Undershoot protection

Input/output continuous current (max) (mA)

128

Rating

Catalog

Drain supply voltage (max) (V)

5.5

Supply voltage (max) (V)

5.5

Configuration

1:1 SPST

Number of channels

4

Power supply voltage - single (V)

5

Protocols

Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART

Ron (typ) (Ω)

3

CON (typ) (pF)

12.5

ON-state leakage current (max) (µA)

10

Bandwidth (MHz)

200

Operating temperature range (°C)

-40 to 85

Features

Undershoot protection

Input/output continuous current (max) (mA)

128

Rating

Catalog

Drain supply voltage (max) (V)

5.5

Supply voltage (max) (V)

5.5

SOIC (D)

14

51.9 mm² 8.65 x 6

SSOP (DB)

14

48.36 mm² 6.2 x 7.8

SSOP (DBQ)

16

29.4 mm² 4.9 x 6

TSSOP (PW)

14

32 mm² 5 x 6.4

VQFN (RGY)

14

12.25 mm² 3.5 x 3.5

Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
Bidirectional Data Flow, With Near-Zero Propagation Delay
Low On-State Resistance (r_on) Characteristics
(r_on = 3 Typical)
Low Input/Output Capacitance Minimizes Loading and Signal Distortion
(C_io(OFF) = 5 pF Typical)
Data and Control Inputs Provide Undershoot Clamp Diodes
Low Power Consumption
(I_CC = 3 µA Max)
V_CC Operating Range From 4 V to 5.5 V
Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog Applications: USB Interface, Bus Isolation, Low-Distortion Signal Gating

Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
Bidirectional Data Flow, With Near-Zero Propagation Delay
Low On-State Resistance (r_on) Characteristics
(r_on = 3 Typical)
Low Input/Output Capacitance Minimizes Loading and Signal Distortion
(C_io(OFF) = 5 pF Typical)
Data and Control Inputs Provide Undershoot Clamp Diodes
Low Power Consumption
(I_CC = 3 µA Max)
V_CC Operating Range From 4 V to 5.5 V
Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog Applications: USB Interface, Bus Isolation, Low-Distortion Signal Gating

The SN74CBT3125C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r_on), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3125C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT3125C is organized as four 1-bit bus switches with separate output-enable (1OE\, 2OE\, 3OE\, 4OE\) inputs. It can be used as four 1-bit bus switches or as one 4-bit bus switch. When OE\ is low, the associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 1-bit bus switch is OFF, and the high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBT3125C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r_on), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3125C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT3125C is organized as four 1-bit bus switches with separate output-enable (1OE\, 2OE\, 3OE\, 4OE\) inputs. It can be used as four 1-bit bus switches or as one 4-bit bus switch. When OE\ is low, the associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 1-bit bus switch is OFF, and the high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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	Type	Title		Date
*	Data sheet	SN74CBT3125C datasheet (Rev. A)		15 Oct 2003
	Application note	Selecting the Correct Texas Instruments Signal Switch (Rev. E)	PDF \| HTML	02 Jun 2022
	Application note	Multiplexers and Signal Switches Glossary (Rev. B)	PDF \| HTML	01 Dec 2021
	Application note	CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C)	PDF \| HTML	19 Nov 2021
	Application brief	Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C)	PDF \| HTML	06 Jan 2021
	Selection guide	Little Logic Guide 2018 (Rev. G)		06 Jul 2018
	Selection guide	Logic Guide (Rev. AB)		12 Jun 2017
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		02 Dec 2015
	User guide	LOGIC Pocket Data Book (Rev. B)		16 Jan 2007
	More literature	Digital Bus Switch Selection Guide (Rev. A)		10 Nov 2004
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		08 Jul 2004
	User guide	Signal Switch Data Book (Rev. A)		14 Nov 2003
	Application note	Bus FET Switch Solutions for Live Insertion Applications		07 Feb 2003

Design & development

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