SN75DP129

ACTIVE

2.5-Gbps DP++ to HDMI 1.3 retimer

Product details

Type Redriver Protocols HDMI Rating Catalog Speed (max) (Gbpp) 2.5 Number of channels 1 Supply voltage (V) 3.3 Operating temperature range (°C) 0 to 85
Type Redriver Protocols HDMI Rating Catalog Speed (max) (Gbpp) 2.5 Number of channels 1 Supply voltage (V) 3.3 Operating temperature range (°C) 0 to 85
VQFN (RHH) 36 36 mm² 6 x 6
  • DisplayPort Physical Layer Input Port to TMDS Physical Layer Output Port
  • Integrated TMDS Level Translator With Receiver Equalization
  • Supports Data Rates up to 2.5 Gbps
  • Integrated I2C Logic Block for DVI / HDMI Connector Recognition
  • Integrated Active I2C Buffer
  • Enhanced ESD: 12 kV on all Pins
  • Enhanced Commercial Temperature Range: 0°C to 85°C
  • 36 Pin 6 × 6 QFN Package
  • APPLICATIONS
    • Personal Computer Market
      • DP/TMDS Hardware Key (Dongle)
      • Desktop PC
      • Notebook PC
      • Docking Station
      • Standalone Video Card

  • DisplayPort Physical Layer Input Port to TMDS Physical Layer Output Port
  • Integrated TMDS Level Translator With Receiver Equalization
  • Supports Data Rates up to 2.5 Gbps
  • Integrated I2C Logic Block for DVI / HDMI Connector Recognition
  • Integrated Active I2C Buffer
  • Enhanced ESD: 12 kV on all Pins
  • Enhanced Commercial Temperature Range: 0°C to 85°C
  • 36 Pin 6 × 6 QFN Package
  • APPLICATIONS
    • Personal Computer Market
      • DP/TMDS Hardware Key (Dongle)
      • Desktop PC
      • Notebook PC
      • Docking Station
      • Standalone Video Card

The SN75DP129 is a Dual-Mode DisplayPort input to Transition-Minimized Differential Signaling (TMDS) output. The TMDS output has a built-in level translator, compliant with Digital Visual Interface 1.0 (DVI) and High Definition Multimedia Interface 1.3 (HDMI) standards. The SN75DP129 is specified up to a maximum data rate of 2.5 Gbps, supporting resolutions greater then 1920 x 1200 or HDTV 12-bit color depth at 1080p (progressive scan).

An integrated Active I2C buffer isolates the capacitive loading of the source system from that of the sink and interconnecting cable. This isolation improves overall signal integrity of the system and provides greater design margin within the source system for DVI / HDMI compliance testing.

A logic block was designed into the SN75DP129 to assist with TMDS connector identification. Through the use of the I2C_EN pin, this logic block can be enabled to indicate the translated port is an HDMI port; therefore legally supporting HDMI content.

The SN75DP129 is a Dual-Mode DisplayPort input to Transition-Minimized Differential Signaling (TMDS) output. The TMDS output has a built-in level translator, compliant with Digital Visual Interface 1.0 (DVI) and High Definition Multimedia Interface 1.3 (HDMI) standards. The SN75DP129 is specified up to a maximum data rate of 2.5 Gbps, supporting resolutions greater then 1920 x 1200 or HDTV 12-bit color depth at 1080p (progressive scan).

An integrated Active I2C buffer isolates the capacitive loading of the source system from that of the sink and interconnecting cable. This isolation improves overall signal integrity of the system and provides greater design margin within the source system for DVI / HDMI compliance testing.

A logic block was designed into the SN75DP129 to assist with TMDS connector identification. Through the use of the I2C_EN pin, this logic block can be enabled to indicate the translated port is an HDMI port; therefore legally supporting HDMI content.

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 1
Type Title Date
* Data sheet DisplayPort to TMDS Translator datasheet (Rev. A) 04 Mar 2008

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins CAD symbols, footprints & 3D models
VQFN (RHH) 36 Ultra Librarian

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos