The TPS732-Q1 low-dropout (LDO) voltage regulator uses san NMOS topology consisting of an NMOS pass transient in a voltage-follower configuration. This topology is stable using output capacitors with low ESR, and even allows operation without a capacitor. The topology also provides high reverse blockage (low reverse current) and ground pin current that is nearly constant over all values of output current.
The TPS732-Q1 uses an advanced BiCMOS process to yield high precision while delivering low dropout voltages and low ground pin current. Current consumption, when not enabled, is under 1µA and designed for portable applications. The extremely low output noise (30µVRMS with 0.1µF CNR) is designed for powering VCOs. This device is protected by thermal shutdown and foldback current limit.
The TPS732-Q1 low-dropout (LDO) voltage regulator uses san NMOS topology consisting of an NMOS pass transient in a voltage-follower configuration. This topology is stable using output capacitors with low ESR, and even allows operation without a capacitor. The topology also provides high reverse blockage (low reverse current) and ground pin current that is nearly constant over all values of output current.
The TPS732-Q1 uses an advanced BiCMOS process to yield high precision while delivering low dropout voltages and low ground pin current. Current consumption, when not enabled, is under 1µA and designed for portable applications. The extremely low output noise (30µVRMS with 0.1µF CNR) is designed for powering VCOs. This device is protected by thermal shutdown and foldback current limit.